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ViewSonic PJ-WPD-800 User Manual
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ViewSonic PJ-WPD-800 User Manual

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User's Manual
Product: PJ-WPD-800
Brand: ViewSonic
Model: VS20085

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Summary of Contents for ViewSonic PJ-WPD-800

  • Page 1 User’s Manual Product: PJ-WPD-800 Brand: ViewSonic Model: VS20085...

  • Page 3: Video Formats

    Core • Amlogic S905Y4 Quad A35 • 16000 DMIPS • 32K I/D cache • 512KB L2 cache • ARM G31 MP2 • OpenGL ES 3.2 Graphics engine Wi-Fi • 802.11ac 2x2 + BT5 • Dual Band 2.4GHz & 5GHz • MIMO •...
  • Page 4 Environment • Mains supply voltage 100-240V • Frequency 50-60Hz • Operation Temperature: 0~40 ℃ • Storage Temperature: -10~70 ℃ • Operation Humidity: 5%~90% • Storage Temperature: 0~95% • Surge Protection: 4Kv S905Y4 Stick Block Diagram Accessories • USB Power Cable •...

  • Page 5: Remote Control

    Remote Control...

  • Page 6: Initial Setup

    Initial Setup 1. Plug in Dongle Plug your dongle into a power outlet and an HDMI port on your TV 2. Switch TV Input Turn on your TV and switch to the input/source your dongle is plugged into 3. Put batteries in your voice remote...
  • Page 7 4. Get the Google Home app Follow the step on your TV and in the app...
  • Page 8 Wi-Fi Module: EWN-8822CSB2AC IEEE802.11b/g/n/a/ac SDIO Wireless+Bluetooth 2.1/3.0/4.2.5.0 Module 1. General Specifications The module provides a complete solution for a high-performance integrated wireless and Bluetooth device . It provides SDIO interface for WiFi and HS-UART interface for Bluetooth. The module complies with IEEE 802.11 a/b/g/n/ac 2T2R MIMO standard , and Maximum PHY data rate up to 173.3 Mbps using 20 MHz bandwidth ,400 Mbps using 40 MHz bandwidth, and 866.7 Mbps using 80 MHz bandwidth.
  • Page 9 2. Features 2.1 WLAN ➢ Supports 802.11ac 2x2, Wave-2 compliant with MU-MIMO ➢ Completes 802.11n MIMO solution for 2.4GHz and 5GHz band ➢ Maximum PHY data rate up to 173.3Mbps using 20MHz bandwidth, 400Mbps using 40 MHz bandwidth, and 866.7Mbps using 80MHz bandwidth ➢...

  • Page 10: System Block Diagram

    3. System Block Diagram...
  • Page 11 4. PHY Specification Wi-Fi Specification Protocol IEEE 802.11b/g/n/a/ac Interface SDIO 1.1 / 2.0 / 3.0 2.4GHz band CH1~CH14/2400-2483.5MHz Frequency 5GHz Band CH36~CH48/5150-5250MHz CH52~CH64/5250-5350MHz CH100~CH140/5470-5725MHz CH149~CH165/5725-5850MHz Bandwidth 2.4G&5G Band Refer to Channel Plan Domain Code PHY Rate 20/40/80 MHz Maximum PHY data rate up to 173.3 Mbps using 20MHz bandwidth; Frequency Error Maximum PHY data rate up to 400 Mbps using 40MHz bandwidth;...
  • Page 12 802.11n (2.4G HT40 MCS4): -22dB 802.11n (2.4G HT40 MCS7): -30dB 802.11a (5G 54Mbps): 17 +1/-2dBm 802.11n (5G HT20 MCS7): 16 +1/-2dBm 802.11n (5G HT40 MCS7): 16 +1/-2dBm 802.11ac (5G VHT20 MCS8): 14 +1/-2dBm Transmit Power 802.11ac (5G VHT40 MCS9): 14 +1/-2dBm 802.11ac (5G VHT80 MCS9): 14 +1/-2dBm Other TX power rate see the “power by rate”...
  • Page 13 802.11n (2.4G HT20 MCS7): -69dBm (Max.) -77dBm (Typ.) 802.11n (2.4G HT40 MCS0): -84dBm (Max.) -92dBm (Typ.) 802.11n (2.4G HT40 MCS4): -72dBm (Max.) -76dBm (Typ.) 802.11n (2.4G HT40 MCS7): -66dBm (Max.) -73dBm (Typ.) 802.11a (5G 6Mbps): -87dBm (Max.) -94dBm (Typ.) 802.11a (5G 24Mbps): -79dBm (Max.) -88dBm (Typ.) Receive Sensitivity...

  • Page 14: Other Specifications

    1Mbps for Basic Rate; PHY Rate 3 Mbps for Enhanced Data Rate; 2 Mbps for BLE 6dBm, typical Transmit Power <-89dBm @ BER=0.1% for GFSK (1Mbps); <- -DQPSK (2Mbps); Receive Sensitivity <-83dBm @ BER=0.01% for 8-DPSK (3Mbps); <-90dBm @ PER=30.8% for BLE GFSK(1Mbps): -20dBm;...
  • Page 15 6. DC Characteristics Parameter Symbol Min. Typical Max. Unit VDD_3.3V 3.3V Supply Voltage IDD_3.3V 3.3V Rating Current VDDIO SDIO I/O Voltage Depend on the SDIO protocol (1.8V or 3.3V) 7. S11 Report FEWN-8822CSB2AC 2.4G Path A...
  • Page 16 EWN-8822CSB2AC 2.4G Path B 4 EWN-8822CSB2AC 5G Path A...
  • Page 17 EWN-8822CSB2AC 5G Path B...

  • Page 18: Module Configurations

    8. Module configurations Module Dimension (L*W*T) 15.2±0.2mm*13.2±0.2mm*2.1±0.2mm 2.1±0.2 EWN-8822CSB2AC Module Dimension Recommended Footprint : EWN-8822CSB2AC Module Dimension...

  • Page 19: Pin Definition

    9. Pin Definition TOP VIEW See table for the module hardware pin definition. Default Pull Definition Type Description Power level Ground Wi-Fi B Wi-Fi Path B ANT I/O port Ground Ground Ground...
  • Page 20 Default Definition Type Description Power level Pull Ground Ground Ground Wi-Fi A Wi-Fi Path A ANT I/O port Ground Ground BT_ANT Bluetooth ANT I/O port Internal GPIO6 General Purpose Input/Output Pin VDDIO Internal G_BT General Purpose Input/Output Pin VDDIO WL_REG_ON General Purpose Input/Output Pin VDDIO WL_WAKE_HOST...
  • Page 21 Default Definition Type Description Power level Pull PCM_SYNC PCM SYNC signal VDDIO PCM_IN PCM data input VDDIO PCM_OUT PCM data output VDDIO PCM_CLK PCM clock VDDIO External low power clock input Internal SUSCLK VDDIO (32.768KHz) Ground No connect VDDIO I/O voltage supply input (1.8V typ.) VDDIO No connect Main power voltage source input...
  • Page 22 Default Definition Type Description Power level Pull No connect Ground Internal HOST_WAKE_BT Host wake-up Bluetooth VDDIO Output BT_WAKE_HOST Bluetooth to wake-up the host VDDIO High Note: The internal pull-up/down resistances of the chip are about 50K~100K ohm 10. Module Photos PIN 1 TOP VIEW BOTTOM VIEW...
  • Page 23 12. Reference design 12.1 Power supply requirement The module power supply voltage is DC+3.3V, and the maximum module current is 800mA. The power supply design needs to consider the output current and power interference. To avoid the +3.3V power supply from interfering with other circuits on the motherboard, it is recommended to supply to the module using the regulator circuit alone.

  • Page 24: Sdio Interface

    Table DC Characteristics Symbol Parameter Minimum Typical Maximum Peak Current VDD_3.3V (PIN36) 3.3V Supply Voltage 3.0V 3.3V 3.6V 0.8A Table Platform Power Rail Requirements Rise time VDD_3.3V VDD_3.3V VDD_3.3V Power range Ripple Noise +/-0.165V 300mVpp@switching frequency > 100KHz 0.5ms 12.2 SDIO Interface The SDIO interface has 4 data lines, a cock signal line and a command signal line.
  • Page 25 Connect 50 Ohm matching antenna reference circuit The antenna ANT1 in the figure above must be 50 Ohm. If the antenna is not matched, it is recommended to add a set of PI type matching network at the front of the antenna to match the antenna.
  • Page 26 calculate the distance from the RF trace layer to the next ground layer.) 2. The RF line must be surrounded by ground copper and ground holes. 3. The PI-type matching circuit for adjusting the impedance of the module is placed close to the module.
  • Page 27 12.4 Application Circuit for SD_RESET and BT_DIS_N with Platform There is internal pull-up, about 100K, resistor design in SD_RESET and BT_DIS_N pad. If Host SOC need to control these two pins, choose host GPIO without pull capability to avoid voltage divider. Middle range of IO voltage would affect WiFi booting up Host GPIO control WL_DIS_N and BT_DIS_N If Host GPIO has pull-down capability and it can’t be avoided, suggest to add 10K pull down resistor in circuit to ensure IO is in low level.
  • Page 28 12.5 SDIO Power On Sequence SDIO Power On Sequence 12.6 Motherboard interference avoidance Motherboard interference comes from: high-speed data interface (HDMI), the Operating frequency of main chip, DDR, DC-DC power supply. The method of avoiding interference according to the characteristics of various signals is also different. The main methods of interference avoidance include : 1.
  • Page 29 although the 16x frequency is not in the Wi-Fi band, the isolation of the frequency is not good, and the Wi-Fi signal will be interfered to some extent. If the distance between the HDMI interface and the Wi-Fi module on the PCB is less than 5cm, the HDMI output display will interfere with the Wi-Fi signal, resulting in problems such as Wi-Fi connection failure and throughput drop.
  • Page 30 HDIM and USB interference 12.6.2 The main chip interferes with DDR Because the main chips operate at about 800MHz or DDR2 operate at 667MHz, 3x frequency of 800MHz and 4x frequency of 667MHz are near 2.4GHz band. It must to place Wi-Fi modules and antennas far away from the main chip and DDR.
  • Page 31 Main chip and DDR interference 12.7 Recommended secondary reflux temperature curve The number of reflux shall not exceed 2 times, and the tin feeding height of the half hole of the module shall be no less than 1/4. The lead-free reflux curve requirements of Wi-Fi module products are shown in figure24 Furnace temperature curve...
  • Page 32 NOTE: The maximum furnace temperature of the module is 260 , don't exceed this temperature. The gold plating thickness of the module pad is 2u". ISED Compliance Statement Section 8.4 of RSS-GEN This Device complies with Industry Canada License-exempt RSS standard(s). Operation is subject to the following two conditions: 1) this device may not cause interference, and 2) this device must accept any interference, including interference that may cause undesired operation of the device.
  • Page 33 FCC Compliance Statement (Part 15.19) This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: 1. This device may not cause harmful interference, and 2. This device must accept any interference received, including interference that may cause undesired operation.

This manual is also suitable for:

Vs20085