General Informatlon-7A42 Volume 2
Service Manual (Volume 2)
Signature Analysis Tables
I
WARNING)
THIS
MANUAL
CONTAINS
TROUBLE-
SHOOTING INSTRUCTIONS FOR USE BY
QUALIFIED PERSONNEL ONL Y. TO A VOID
PERSONAL INJURY DO NOT PERFORM
ANY SERVICING
UNLESS
YOU ARE
QUALIFIED TO DO SO.
Section
1-GENERAL INFORMATION contains
content descriptions of the Operators and Service
manuals and details about how to use the signature
tables.
Section 2-SIGNATURE ANALYSIS TABLES
contains starting
points, setup procedures, and
signature tables for troubleshooting the 7A42.
HOW TO USE THE
SIGNATURE TABLES
Throughout the following sample procedure refer to
Figure 2-1, "Example for Using the Signature Analysis
Troubleshooting Tables," which
is located at the
beginning of section 2. First, let's assume a pattern of
Trigger Diagnostic Failure codes were reported that,
after comparison with the Trigger Diagnostic Charts,
implicates the Boolean Logic circuitry. (The Trigger
Diagnostic Charts are located in the Diagnostics and
Troubleshooting part of the Maintenance section in the
Volume 1 service manual.) Trigger Troubleshooting Tip
01 (in Volume 1) calls for SA Test #23, Starting Point #1,
to troubleshoot the problem. Proceed as follows:
1. Find SA Test #23, Starting Point #1. Perform the
indicated Setup Procedure, which for this case is #1.
Verify that the high-level signature is SP54. If it is
not, double-check the test setup.
2. Proceed to the first IC listed in the SA Test #23
Starting Point List #1 (ASU500). Check that the
signature for ASU500 pin 15 is 544F, as specified.
Continue checking the signatures listed in Starting
Point List #1 until you find an incorrect one. For this
example, assume that the second signature on the
list (H9CS) does not match the signature at ASU530
pin 15.
3. Locate the signature table for ASU530 in SA Test
#23. In this example, part of the table set for SA Test
#23 is shown in Figure 2-1.
4. In the row headed OUTPUT PIN, find the column
labeled with the number of the pin with the bad
1-2
signature. In this example, pin 15 is the fifth column
from the left.
5. Scan down the column under the OUTPUT
SIGNATURE for pin 15 (H9CS, in this case) until
you locate the first arrow.
S. Check that the INPUT PIN (pin 12) indicated in this
row has a signature (H9CS) that matches the
signature in the INPUT SIGNATURE column. Of
course, the measurement must be made under the
correct setup conditions, as listed in the column
headed INPUT SETUP. In this example, we are still
in Input Setup 1, as specified previously.
7. If the input pin signature matches the signature
(H9CS) given in the table, and there are more
arrows in the column under pin 15, proceed
downward to the next arrow.
S. Check that the next input pin indicated by an arrow
(pin 13) has a signature that matches the entry in
the INPUT SIGNATURE column (SP54). In this
example we are still using Input Setup #1, as
originally specified. If the signature does not match
the signature in the table, go to step 10.
9. If the entire list (rows that contain arrows) of
contributing inputs is exhausted without finding an
input with a bad signature, the output pin (node)
under test is at fault.
The IC that was tested last is probably defective, but
you should also check these other possibilities:
a. The output could be shorted to something.
b. One of the inputs to which the output connects
could have developed a short.
c. If the output is part of a wired-OR or wired-AND
structure,
the other participants
in that
configuration
could
be
at fault.
The SA
stimulation routines are designed to minimize
these situations, but they do not eliminate them.
This is as far as you can go with signature analysis.
The problem is isolated to the node level. Now you
must use other techniques. However, it may be
helpful to leave the SA stimulation routine running
to aid oscilloscope-based troubleshooting. Refer to
the Diagnostics and Troubleshooting part of the
Maintenance section
in Volume 1 for more
information.
10. When you find a bad Input Signature, the IC under
test is probably operating correctly. In this example,
the column headed INPUT'S SOURCE NODE is the
designation for the IC output pin or other circuit
element that drives the IC under test. Check the
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