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3.IO
DISPLAY
TIME
CIRCUIT
The
Display Time
Circuit
dcterrnincs how long
an
anslvci
\\'ill
be
displayed before the
Dext
cou[t
is
begun.
Display
tiine is
started by the Gate Binary
when
it
closes
the
Counted
Signal
Gate,
and
the
Dis-
play
Time Circuit
prc1,ents
a
new
triggcr
pulse
fronl
reaching the Gate
Binary to
and
start
a new count.
This is
done
b-v
biasing the Gate
Binary's
B-side
(start
channel)
diode gate
beyond
cutolf. The
counter
will
then continue
to display the last
count
until
the
start-channel diode gate
is
Ieopened.
The
Display Time
Circuit's
action begins wher
t}Ie
Gate
Binary B side
fires
the Display
Time Thyratron
as the
A side closes t}le
Counted Signal
Gate. Display
Time Thyratron Vl0? starts
the display time
by
charging
C123
positi!,eli'and switching Display Time
Discriminator
V104 so
it
produces
a
positive
output
voltage.
The
positive output voltage applied to
the
cathode
of
Diode Gate
V102B, closes the gatc
and
plelents trigger
pulses
from
l'eaching the
Gate
Bi-
mry.
The display holding action continucs
until
C123
discharges through ltl6S
and
decreases the grid
(pin 6) voltage on
Display
Time Discriminator
V104
and
retriggers
v104 to produce a negative
output
voltage. The negative output voltage from the Dis-
play
Time Discriminator
reopens Diode Gate V1028
and
permits
the next negative pulse
to
operate the
Gate
Binarf'
and
start
a new
measurenlent,
3.I
I
RESE'
CIRCUII
The Reset
Circuit
generates
a
strong positive pulse
which resets
all
indicating counter units
to
"0"
be-
Iore
each new
count
is
begun. During autonlatic,
repetitiYe measurements,
Reset
Thyratron
V105
generatcs
this positil'e
pulse
when
it
is triggered
by
the same
positive pulse from
the
A
side
oJ
Gate
Binary
V
103
that
opens
the Counted SignaI Gate to
start
a new
count. The pulse to the Signal Gate
is
delayed
twenty microseconds by Delay
Line
DL101
to give
tie
counter
circuits time to reset
and
stabilize
before
they receivc the
new
signals.
The manual
RESET
button generates
a
positive pulse
ior
resetting the counters
by ungrounding
the
reset
wire
so
that
its potential automatically rises applox-
imately
40
yolts positive.
The
positive reset pulse
for
the
counters also resets
the decade divider' to the beginning of
its division
cycle
so
that
it will
divide
tie
next input
signal
by
ten.
Sect,
IU
Page
7
].I2
TIME
INIERVAL
INPUT
CIRCUITS
During
time inten,al
ureasurements, the measur(r-
nrent
start
and
stop input
signals are fed to separat.'.
identical Amplitude Discriminators which
generi'rtc
strong
trigger
pulses
as
the
input yoltage lcveIs pass
the levels indicated by the TIiIGGER
LEVEL
VOLTS
controls. The sharp pulses
produced
lJy
the
Amputude
Discrimi.nators are fed directiy to the
Gate
Control
Binary which in turn operates the
Counted Signa] Gate
to
make
the
measurement.
The
TRIC.GEiI
LEVEL
VOLTS
controls in the START
and STOP
input
circuits
determine the input voltage
Ie1'el
that
will
start
and
stop a
time interval
mea-
surement
bj7
simultaneously attenuating
t}Ie
input
sig-
nal
and
applying a negative bias voltage to the
Am-
pLitude
Discriminators.
lvhen the TRIGGER
LEVEL
contncls
are
set
to
zero, there is
a
flxed
attenuation
of
4
to
1
and no
d-c
bias
on
the
Amplitude Discrim-
inator,
which
triggers
as
its
input signal
voltage
passes
tlrough zero
volts.
When
the
TRICCER
LEVEL
control
is
set to +100,
tlere
is
an
attenuation
ol
20
to
1 and
a
d-c bias of -5 volts
so
t}lat
the input signal
is
reduced
to
+5
volts, just suflicient to override
the
-5-volt
bias
and
trigger
t-he
Amplitude
Discriminator.
Any
d-c
voltage accompanying
the signal applied
to
the
input
co
rectors
wii-I
alter
the
d-c
bias
and
rerder
the
c
ontrol calibrations inaccurate.
3.I3
POWER
SUPPLY
The power supply
section supplies +330 vdc unregu-
lated
at
?5
ma,
+200
vdc regulated
at
B0
ma,
-105 vdc
regulated
at
25
ma and -175
vdc unregul&ted
for
the
circuits
oJ
tie
counter. The positive regulated voltage
is
obtained
Irom
an
electronic regulator circuit,
V117,
V11B and
V119
while the negative regulated
voltage
is
obtained
lrom
gaseous
voltage
regulator
tube V119. The unregulated voltages are obtained
from
the power sources
lor
the voltage
regulators.
The
+200
volt regulator is
a
two stage,
direct
coupled,
feedback
amplilier.
V117
is
the
series regulator
tube
and
carfies
the
totai
Ioad
current.
V118
controls the
resistance
oM
1?
to
keep
the output voltage con-
stant over
a
wide
ralge
of load
currents
and Line
volt-
age
fluctuations. Any increase in
output
voltage
will
make
the
grid
of V118 more
pos
j.tive; this will,
in-
c
rease
its
pl,ate
current
and
in turn decrease the bias
on
V11?. Increasing the bias
on V11?
increases its
resistance
ard retum
the output
voltage to the
origital
value. A decrease in
output
voltage
will
have the
reverse eflect
on
the
circuit.
V119,
a
voltage
reg-
ulator
tube,
suppl.ies a
constant
lixed bias
for
V118.
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