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10.
11.
12.
13,8.
14.
15.
16.
17.
18.
19.
20.
Ground
Ground
,
Output
2.
This
is
the
delayed
output.
The
50
ns
pulse
is
used
as
the
SYNC
OUT
pulse
in
the
ADVANCE
mode
and
as
the
trigger
for
the
PW
module
in
the
DELAY
and
DOUBLE
PULSE
modes.
The
delay
timing
capacitance
is
placed
across
these
pins
by
Swl
Gate.
Triggering
is
inhibited
in
all
modes
when
a TTL
high
(+24V
to
+5V)
is
applied
to
this
pin.
Connected
to
front
panel
GATE
connector.
EXT
Trig.
This
input,
from
pin
4
of
the
threshold
module,
triggers
the
clock
module
when
the
INT/EXT
switch
(SW3)
is
in
the
EXT
position.
This
pin
is
an
unbuffered
replica
of
Output
2
(pin
12).
Not
used.
Single/Double.
When
this
pin
is
grounded
by
SW5,
a
single
pulse
appears
each
cycle
at
Output
1.
When
this
pin
is
connected
to
+5.8V,
Output
1
provides
a
double
pulse
with
separation
of
the
leading
edges
of
the
pulses
controlled
by
the
DELAY
controls.
This
is
connected
to
the
normally
closed
terminal
of
SW10
The
voltage
on
this
pin
varies
the
frequency
of
the
internal
oscillator.
The
voltage
varies
between
0
and
+5.8V,
with
the
highest
and
lowest
frequencies
varying
by
approximately
a
factor
of
10.
Ground
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