Advantech PCLD-788 User Manual page 6

Relay multiplexer board
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Installation
PCLD-788
CN4
:
CNS
:
CN6 & CN7 :
CN8
:
to the channel
number
selected.
For example,
when
C3 to CO are 1010, channel
10 is closed.
The bits C7
to C4 are board selection
Signals.
The output
of
PCLD-788 is enabled only when the bit pattern of C7
to C4 is matched with the setting of SW1 (Card ID).
Pin
#17
to pin
#20
are
power
supply
from
PC.
Others pins are not used.
co
ci
c2
23
c4
c5
(ri
GND
GND
+5V
+12v
Fig. 2-2-1
CJC signal output.
OV at 0°C, 24.4mV/°C
Channel-close
signal output.
It offers both inversed
and non-inversed ` logic.
The output signal of the relay multiplexer
External power input terminal.
External power input
is used when
not using PC power.
The jumper JP1
needs position as following
:
Using
PC power
:
PC
EXT
°
°
Using
External
power
PC
:
PC
EXT
o
e
Ea
Fig. 2-2-2

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