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ICP Electronics WAFER-5821 Manual

Low power gxlv/gx1 mmx with svga, ethernet, sbc
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WAFER-5821
Low Power GXLV/GX1 MMX
with SVGA, Ethernet, SBC.
Copyright Notice
© 2001 Copyright by ICP Electronics Inc. All rights reserved. Manual
first edition Feb. 20, 2001.
The information in this document is subject to change without prior
notice in order to improve reliability, design and function and does not
represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, special,
incidental, or consequential damages arising out of the use or inability
to use the product or documentation, even if advised of the possibility
of such damages.
This document contains proprietary information protected by copyright.
All rights are reserved. No part of this manual may be reproduced by
any mechanical, electronic, or other means in any form without prior
written permission of the manufacturer.
Trademarks
WAFER-5821 is a registered trademark of ICP Electronics Inc. IBM
PC is a registered trademark of International Business Machines
Corporation. Intel is a registered trademark of Intel Corporation. Other
product names mentioned herein are used for identification purposes
only and may be trademarks and/or registered trademarks of their
respective companies

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  • Page 1 Low Power GXLV/GX1 MMX with SVGA, Ethernet, SBC. Copyright Notice © 2001 Copyright by ICP Electronics Inc. All rights reserved. Manual first edition Feb. 20, 2001. The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.

  • Page 2: Table Of Contents

    1. Introduction ........... 5 1.1 Specifications............5 1.2 What You Have ............7 2. Installation ............. 8 2.1 Wafer-5821 Block Diagram & Board Layout ... 9 2.2 Unpacking Precautions ........12 2.3 System Memory DRAM........12 2.4 Watch-Dog Timer Setting ........12 2.5 Clear CMOS Setup ..........
  • Page 3 3.14 Power Reset (JP3,JP10)........22 3.15 ATX Power control (JP9)........23 3.16 Debugging Port (CN18)........23 4. AWARD BIOS Setup........24 4.1 GETTING START..........25 4.2 STANDARD CMOS SETUP ......... 26 4.3 BIOS FEATURES SETUP........28 4.4 CHIPSET FEATURES SETUP......29 4.5 POWER MANAGEMENT SETUP ......
  • Page 4 Appendix A. Watchdog Timer ....... 42 Appendix B. I/O Address Map....... 45 B.1 System I/O Address Map ........45 B.2 DMA channel assignments ........46 B.3 Interrupt assignments .......... 46 B.4 1st MB memory map..........47...

  • Page 5: Introduction

    Introduction WAFER-5821 is designed for limited space applications. It supports the full functions of an AT-compatible industrial computer on a single board. The WAFER-5821 is equipped with a low-power consumption and high performance GXLV/GX1 processor on board. It also contains an SDRAM SODIMM socket that can support up to 128MB memory.
  • Page 6 *System memory: One 144-pin SODIMM socket support up to 128 MB SDRAM *BIOS: AWARD 256 KB Flash memory *Display Controller: MediaGx processor has applied the UMA technology that provides 1.5-4MB display memory, to be set up by BIOS Support non-interlaced CRT monitors resolutions up to 1280x1024 @256 colors or 1024x768 @ 16bpp *IDE interface: The IDE supports four PCI Enhanced IDE hard drives...

  • Page 7: What You Have

    *DiskOnChip Flash Disk: Supports one 32-pin socket for DiskOnChip Flash Disk *4 Digital Outputs *Power supply: +5V (4.75V to 5.25V) @2A (typical) *Operating temperature: -20-60 C (-4-140 *Dimension: 6.2” (L) x 4.2” ( W) (157mmx102mm) 1.2 What You Have Before you begin installing the product, please check the following materials are included in the package: •...

  • Page 8: Installation

    Installation This chapter gives instructions about how to set up the WAFER-5821 hardware, including directions of setting jumpers connecting peripherals, switches indicators. Before installation, please pay attention to the unpacking precautions on the following page for safety.

  • Page 9: Wafer-5821 Block Diagram & Board Layout

    2.1 Wafer-5821 Block Diagram & Board Layout YUV Port SDRAM MD [ 63:0 ] ( Video ) 1 x S0-DIMM MediaGX Socket MMX- Enhanced Clocks Processor Serial Packet RGB Port System ( Graphics ) Clocks RTL-8139 PCI Bus 10/100M RJ45...
  • Page 10 ATX-POWER IDE 1 IDE 2 Wafer-5821 Board Layout Cx5530A WAFER-5821 Geode DEBUG CLEAR PORT CMOS...
  • Page 11 Geode WAFER-5821 Cx5530A...

  • Page 12: Unpacking Precautions

    Ground yourself to remove any static charge before touching the Wafer-5821 SBC. You can do it by using a grounded wrist strap at all times or by frequently touching any conducting materials that is connected to the ground.

  • Page 13: Clear Cmos Setup

    • JP8: Watchdog Active Type Setting DESCRIPTION ACTIVATE NMI TO CPU WHEN WDT TIME-OUT RESET WHEN WDT TIME-OUT OPEN DISABLE WDT 2.5 Clear CMOS Setup If you need to clear the CMOS Setup (for example forgot the password you should clear the setup and then set the password again.), you should close the JP7 about 3 seconds, then open it again.
  • Page 14 • JP5 & JP6: DiskOnChip Memory Address Setting ADDRES CC000 OPEN OPEN CLOSE OPEN OPEN CLOSE CLOSE CE000 OPEN OPEN OPEN CLOSE OPEN CLOSE CLOSE D0000 CLOSE OPEN OPEN OPEN CLOSE OPEN CLOSE D2000 OPEN CLOSE OPEN OPEN CLOSE OPEN CLOSE D4000 OPEN OPEN CLOSE OPEN CLOSE OPEN CLOSE D6000...

  • Page 15: Connection

    Connection This chapter describes how to connect peripherals, switches and indicators to the WAFER-5821 board. 3.1 Floppy Disk Drive Connector (CN11) WAFER-5821 board is equipped with a 34-pin daisy-chain driver connector cable. • CN11: FDC CONNECTOR PIN NO. DESCRIPTION PIN NO.

  • Page 16: Pci E-Ide Disk Drive Connector (Cn1,Cn16)

    3.2 PCI E-IDE Disk Drive Connector (CN1,CN16) For IDE HDD connection, The WAFER-5821 was designed with two 2.54mm connector (CN1,CN16), which could be converted to four 2.54mm standard IDE connector via proprietary cable. Using this cable you can attach four IDE hard disk drives to the WAFER-5821.

  • Page 17: Parallel Port (Cn8)

    FIFO serial ports. These ports let you connect to serial devices or a communication network. Two 10-pin header(one 10-pin 2.0mm and one 10-pin 2.54mm) are provided by the WAFER-5821. The detailed pin assignment of the connectors are specified as following tables:...

  • Page 18: Keyboard & Ps/2 Mouse Connector (Cn7)

    • CN12: Serial Port1 Connector (10-pin 2.54mm Header) PIN NO. DESCRIPTION PIN NO. DESCRIPTION • CN13: Serial Port2 Connector (10-pin 2.0mm Header) PIN NO. DESCRIPTION PIN NO. DESCRIPTION 3.5 Keyboard & PS/2 Mouse Connector (CN7) A 6-pin header connector(CN7) is located on the mounting bracket for easy connection to a keyboard or PS/2 mouse.

  • Page 19: Usb Port Connector (Cn6)

    D2F- D2F+ 3.7 IrDA Infrared Interface Port (CN15) The WAFER-5821 built-in an IrDA port which support Serial Infrared (SIR) or Amplitude Shift Keyed IR (ASKIR) interface. When use the IrDA port have to set SIR or ASKIR model in the BIOS’s Peripheral Setup’s COM2.

  • Page 20: Vga Connector (Cn4)

    DESCRIPTION PIN NO. DESCRIPTION DDCDAT GREEN DDCCLK BLUE GROUND HSYNC GROUND VSYNC GROUND 3.9 LAN RJ45 Connector (CN9) The WAFER-5821 built-in RJ45 LAN connector is for 10/100Mbps Ethernet (RTL8139C). • CN9: LAN RJ45 Connector PIN NO. DESCRIPTION PIN NO. DESCRIPTION...

  • Page 21: Fan Connector (Fan1)

    3.10 Fan Connector (FAN1) The WAFER-5821 provides CPU cooling fan connector FAN1 that can supply 12V & 5V to the cooling fan. • FAN1: Fan Connector PIN NO. DESCRIPTION GROUND +12V 3.11 External Power Connector (CN2) The WAFER-5821 has an on-board external power connector CN2.

  • Page 22: Digital Out (Cn10)

    This kind of response is highly needed for harsh and critical industrial operating environment. That’s why we design 4 -bit digital outputs on the WAFER-5821. Digital Output, generally, are control signals. You can use these signals to control external devices that needs On/Off circuit or TTL devices.

  • Page 23: Atx Power Control (Jp9)

    3.15 ATX Power control (JP9) • JP9: ATX Power control PIN NO. DESCRIPTION ON/OFF GROUND 3.16 Debugging Port (CN18) This port is used for debugging only. • CN18: Debug Port PIN NO. Signal Name PIN NO. Signal Name IRSTDRV IOW# GROUND...

  • Page 24: Award Bios Setup

    AWARD BIOS Setup WAFER-5821 uses the AWARD PCI/ISA BIOS for system configuration. The AWARD BIOS setup program is designed to provide maximum flexibility in configuring the system by offering various options that may be selected to meet end-user requirements. This chapter is written to assist you in the proper...

  • Page 25: Getting Start

    4.1 GETTING START When you turn on the power button, the BIOS will enter the Power-On-Self-Test routines. These routines will be executed for system test and initialization system configuration verification. After POST routines completed, the following message appears: " Hit DEL if you want to run SETUP" To access AWARD BIOS SETUP UTILITY, press <Del>...

  • Page 26: Standard Cmos Setup

    4.2 STANDARD CMOS SETUP The Standard CMOS Setup is used for basic hardware system configuration. The main function is for Date/Time setting and Floppy/Hard Disk Drive setting. Please refer the following screen for this setup. To set the Date, for example, press either the arrow or <Enter>...
  • Page 27 For IDE hard disk drive setup, please check the following possible setup procedure: 1. Use the Auto setting for detection during boot-up. 2. Use the IDE HDD AUTO DETECTION in the main menu; the computer will automatically detect the HDD specifications. 3.

  • Page 28: Bios Features Setup

    4.3 BIOS FEATURES SETUP This BIOS Features Setup is designed for the 'fine tuning' of your system in order to improve its performance. As for normal operation, you don‘t have to change any default setting. The default setting is pre-set for most reliable operation.

  • Page 29: Chipset Features Setup

    4.4 CHIPSET FEATURES SETUP This setup function works mostly on board's chipset. This option is used to change the chipset's configuration. Please, carefully change any default setting, otherwise the system will run unstable.

  • Page 30: Power Management Setup

    4.5 POWER MANAGEMENT SETUP Power Management Setup helps user to handle the WAFER-5821 board‘s “green” function. This feature can shut down the video display and hard disk to save energy, for example. The power management setup screen is as following...

  • Page 31: Pnp / Pci Configuration

    4.6 PNP / PCI CONFIGURATION This menu is used to assign certain IRQ to your PNP/PCI devices manually. PNP OS Installed: if you install Plug and Play operating system (OS), the OS will reassign the interrupt if you select Yes in this field. If you install a non-Plug and Play OS or if you want to prevent reassigning of interrupt settings, select No in this field.

  • Page 32: Load Bios Defaults

    4.7 LOAD BIOS DEFAULTS If you select 'Y' to this field, the BIOS Defaults will be loaded except Standard CMOS SETUP. The default settings are not optimal and turning all high performance into disabled condition. Select 'N' to abort. Suggestion: for the first time or for our primary user, we suggest you to use LOAD SETUP DEFAULTS because it is the safest mode for your system.

  • Page 33: Load Setup Defaults

    4.8 LOAD SETUP DEFAULTS If you select 'Y' to this field, the Setup Defaults will be loaded except Standard CMOS SETUP. The default settings are optimal configuration settings for your system.

  • Page 34: Integrated Peripherals

    4.9 INTEGRATED PERIPHERALS This option is used to assign Onboard I/O, IRQ, and DMA etc. If you don't know how to configure them, just press <F7> to load Setup Defaults. l Digital I/O Base Address -- 240H, 260H, 280H, Disabled To select the I/O address for digital I/O function.

  • Page 35: Supervisor Password And User Password

    4.10 SUPERVISOR PASSWORD AND USER PASSWORD Supervisor Password sets a password that is used to protect your system and Setup Utility. Supervisor Password has higher priority than User Password. Once you setup the password, the system will always ask you to key-in password every time you enter the BIOS SETUP.

  • Page 36: Hdd Autodetection

    4.11 DE HDD AUTODETECTION This option detects the parameters of an IDE hard disk drive (HDD sector, cylinder, head, etc) automatically and will put the parameters into the Standard CMOS Setup screen. Up to 2 IDE drives can be detected and the parameters will be listed in the box.

  • Page 37: Save & Exit Setup

    4.12 SAVE & EXIT SETUP Select this option when you finish setting all the parameters and want to save them into the CMOS. Just simply press <Enter> configuration changes will be saved...

  • Page 38: Exit Without Saving

    4.13 EXIT WITHOUT SAVING Select this option if you want to exit the Setup without saving the changes that you made. Just simply press <Enter> key and you will exit the BIOS SETUP without saving the changes.

  • Page 39: Svga Setup

    SVGA Setup 5.1 Introduction The WAFER-5821 is equipped with on-board VGA interface. The description below is its specifications and features: 5.1.1 Chipset The WAFER-5821 uses a NS CX5530A chipset as its SVGA controller. It is traditional analog CRT monitors. It accepts interlaced and non-interlaced...

  • Page 40: Display Drivers

    \ Vga \ MediaGX \ Nt40Vga \ 5.2 Further Information For more detailed information about the PCI/SVGA installation in your WAFER-5821, including driver updates, troubleshooting instructions, please refer to the following webs that provide some resources you may need. If not find the information you need,...

  • Page 41: Pci Bus Ethernet Interface

    PCI Bus Ethernet Interface 6.1 Introduction The WAFER-5821 provides a high performance 32-bit Ethernet chipset that is completely compliant with IEEE 802.3 100 Mbps CSMA/CD standards. It is both 100Base-T and 10Base-T compatible. The major network operating system fits it. The medium type can be set up via the RSET8139.exe program...

  • Page 42: Appendix A. Watchdog Timer

    Appendix A. Watchdog Timer The Watchdog Timer is a device to ensure that standalone systems can always recover from catastrophic conditions that cause the CPU to crash. This condition may have occurred by external EMI or a software bug. When the CPU stops working normally, hardware on the board will perform hardware reset (cold boot) to bring the system back to a known state.
  • Page 43 This will enable and activate the countdown timer which will eventually time out and reset the CPU to ensure that this reset condition does not occur, the Watch-Dog Timer must be periodically refreshed by reading the same I/O port 043/843H and 443H. This must be done within the time out period that is selected by software, please refer to the example program.
  • Page 44 ;;ADD YOUR APPLICATION HERE MOV DX, TIMER_START IN AL, DX. ;;START COUNTER ;ADD YOUR APPLICATION HERE W_LOOP: MOV DX, TIMER_STOP IN AL, DX MOV DX, TIMER_START IN AL, DX. ; RESTART COUNTER ; ADD YOUR APPLICATION HERE CMP EXIT_AP, 0 JNE W_LOOP MOV DX, TIMER_STOP IN AL, DX...

  • Page 45: Appendix B. I/O Address Map

    Appendix B. I/O Address Map B.1 System I/O Address Map I/O Address Map Description 000-00F DMA controller #1 020-021 Interrupt controller # 1, master 022-023 Chipset address 040-043 System timer 060-060 Standard 101/102 keyboard controller 061-061 System speaker 064-064 Standard 101/102 keyboard controller 070-07F Real time clock, NMI controller 080-0BF...

  • Page 46: Dma Channel Assignments

    B.2 DMA channel assignments Channel Function Available Available Standard floppy disk controller Parallel port* Cascade for DMA controller 1 Available Available Available * parallel port DMA default setting: DMA 3 parallel port DMA select: DMA 1 or 3 B.3 Interrupt assignments Interrupt # Interrupt source Parity error detected...

  • Page 47: 1St Mb Memory Map

    B.4 1 MB memory map Address Description F000h-FFFFh System BIOS EF00h-EFFFh Expansion ROM* C800h-EEFFh Unused C000h-C7FFh VGA BIOS* B000h-BFFFh VGA DRAM A000h-AFFFh VGA DRAM 0000h-9FFFh Base memory * Default setting...

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