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DR- R504X
No.
Pin Name
1/0
Function
86
DO
1/0
(
87
D1
1/0
88 D2
1/0
89 D3
1/0
SRAM data bus for CIRC (for TEST).
.
90
D4
1/0
91
D5
1/0
92
D6
1/0
93
D7
1/0
94
WE/
0
SRAM write signal output for CIRC (for TEST).
95
RE/
0
SRAM read signal output for CIRC (for
TEST).
96 AO
0
97 A1
0
98 A2
0
SRAM address bus for CIRC (for
TEST).
99 A3
0
100 EPDOUP
0
EPDOUP output.
(
101 EPDODOWN
0
EPDODOWN output.
.
102
vcc
-
103
vcc
Power supply
voltage.
-
104 A6
0
105 A7
0
106 AB
0
107 A9
0
SRAM address for CIRC (for
TEST).
(
108 A10
0
109 A11
0
110 DVCOIN
I
DVCO clock (45.1584/22.5792/11 .2896MHz) input.
111 DVCOOUT
0
DVCO clock (45.1584/22.5792/11 .2896MHz) feedback output.
112 DHALF
0
DVCO clock divided for two output.
113 DPDO
0
Digital audio interface
sync.
agreement output.
114 DAIN
I
Digital audio interface input.
115 DAO UT
0
Digital audio interface output.
116 DREQ
0
Serial data input requirement output.
117 DINO
I
Serial data input
(0).
118 DIN1
I
Serial data input (1
).
119 DOUT
0
Serial data output.
120 C2F
0
Validity flag output.
121 DCKIN
I
Serial data input
clock.
122 BCK
0
Bit clock output
(2.8224MHz).
*
123
BCK/
0
Bit clock inverting output
(2.8224MHz).
*
124 C2FCK
0
Validity flag clock output (176.4kHz).
*
125 WCK
0
Word clock output (88.2kHz).
*
126 LRCK
0
LEFT/RIGHT clock output (44.1
kHz).
*
127 LRCKIN
I
LEFT/RIGHT clock input (44.1
kHz).
*
128 GND
-
Ground.
*:
Frequency values are in the normal
speed.
54
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