Concept Ics - Hitachi 32LD8D20E Service Manual

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15. CONCEPT ICs

15.1. μPD61115
15.1.1 Description
The μPD61115 device is a member of the second generation of multimedia processors based on NEC's
Enhanced MultiMedia Architecture (EMMArchitecture). These devices provide nearly all the functionality
required to realise a high performance and cost-effective digital set-top box or integrated digital TV.
15.1.2 Features
MPEG1 and MPEG2-TS/PS compliant
High performance MIPS32™ 4Kc™ main CPU core
High performance MIPS32™ 4Km™ sub-CPU core
Integrated DVB descrambling with family options for Irdeto and Multi2
36 PID filters, 32 section filters
Video Outputs: 4 DACs for RGB, Component video, S-video and composite output with support
for PAL, NTSC and SECAM
4 graphics planes
Audio Output: 2-channel PCM and SPDIF
Peripherals support
System timers, RTC and Watchdog timer
Motorola/Intel Bus.
15.2. DRX 3973D
Fourth-Generation COFDM Demodulators
15.2.1 Introduction
The DRX 3973D and the DRX 3977D are fourth-generation COFDM demodulators that offer today's
highest level of front-end integration resulting in ultimate DVB-T digital reception, compliant to ETS 300
744, DTG D-Book, EICTA E-Book, and Nordig Unified v1.0.2 .
The DRX 3973/77D applies cutting-edge digital filtering techniques in combination with a high-
performance A/D-converter and PLL configuration, resulting in superior performance figures in the
presence of digitaland analog adjacent channels.
Progressive channel estimator algorithms provide exceptional performance in multipath- and dynamicecho
conditions – an especially important feature for single-frequency networks and indoor reception.
The state-of-the-art impulsive noise cruncher suppresses interferences originating from sources such as
cars, electrical motors, and household appliances.
two fast UARTs with 16byte FIFOs
I
C interface
2
infrared receiver
three wire clocked serial interface

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