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Neoway N715-EA Hardware User's Manual

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Hardware User Guide
Issue 1.1 Date 2023-02-16

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Summary of Contents for Neoway N715-EA

  • Page 1 Hardware User Guide Issue 1.1 Date 2023-02-16...
  • Page 2 OF THE CONTENTS, BUT ALL STATEMENTS, INFORMATION, AND RECOMMENDATIONS IN THIS DOCUMENT DO NOT CONSTITUTE A WARRANTY OF ANY KIND, EXPRESS OR IMPLIED. Neoway provides customers with complete technical support. If you have any question, please contact your account manager or email to the following email addresses: Sales@neoway.com...

  • Page 3: Table Of Contents

    N715-EA Hardware User Guide Contents Contents 1 Safety Recommendations ............... 10 2 About N715-EA ..................11 2.1 Product Overview ........................11 2.2 Block Diagram ..........................11 2.3 Basic Features ........................... 12 3 Reference Standards ................15 4 Module Pins ..................... 16 4.1 Pad Lay-out ..........................
  • Page 4 9 Mounting ....................81 9.1 PCB Package ..........................81 9.2 Application PCB Package ......................82 9.3 Stencil ............................83 9.4 Solder Paste ..........................83 9.5 SMT Oven Temperature Profile ....................83 Abbreviations ................... 85 Copyright © Neoway Technology Co., Ltd...
  • Page 5 Figure 5-11 Reference design for reset by using a button ............... 38 Figure 5-12 Reference design for reset controlled by an MCU ............38 Figure 5-13 Reset process of the N715-EA module ................ 39 Figure 5-14 Recommended design of the USB interface ..............40 Figure 5-15 Reference design of UART interface ................
  • Page 6 Figure 5-43 Driving LED indicator with a triode ................68 Figure 5-44 Reference design of USB emergency download mode ..........69 Figure 8-1 N715-EA top and side view dimensions (unit: mm) ............76 Figure 9-1 Bottom view of N715-EA PCB package (unit: mm) ............81 Figure 9-2 N715-EA application PCB package (top view, unit: mm) ..........
  • Page 7 Table 6-4 N715-EA ESD protection characteristics ................72 Table 7-1 N715-EA operating bands ....................73 Table 7-2 N715-EA RF transmit power..................... 73 Table 7-3 RF RX sensitivity of N715-EA ..................74 Table 7-4 WLAN/BT TX power and RX sensitivity ................75 Copyright © Neoway Technology Co., Ltd...
  • Page 8 About This Document About This Document Scope This document is applicable to N715-EA. It defines the features, indicators, and test standards of the N715-EA module and provides reference for the hardware design of each interface. Audience This document is intended for system engineers (SEs), development engineers, and test engineers.
  • Page 9 Means reader be careful. In this situation, you might perform an action that could result in module or product damages. Means note or tips for readers to use the module Copyright © Neoway Technology Co., Ltd...

  • Page 10: Safety Recommendations

    Follow the requirements below in design and use of the application for this module: Do not disassemble the module without permission from Neoway. Otherwise, we are entitled to ⚫ refuse to provide further warranty.

  • Page 11: About N715-Ea

    This chapter introduces product overview, block diagram, and basic features of N715-EA. 2.1 Product Overview N715-EA is a 4G industrial-grade cellular module developed based on UIS8910DM and its dimensions are (23.80 ± 0.1) mm × (22.80 ± 0.1) mm × (2.5 ± 0.15) mm. The module supports GSM, FDD-LTE (Cat.1), and TDD-LTE (Cat.1).

  • Page 12: Basic Features

    SPI SDIO LCD CAM UART PCM USB 2.3 Basic Features Parameter Description Dimensions: (23.80±0.1) mm × (22.80± 0.1) mm × (2.5± 0.15) mm ⚫ Physical features Package: 76-pin LCC + 72-pin LGA ⚫ Weight: TBD ⚫ Copyright © Neoway Technology Co., Ltd...
  • Page 13 Current in power-off mode : when the module is in power-off mode, there is a voltage being applied at VBAT but the module does not run. Copyright © Neoway Technology Co., Ltd...
  • Page 14 6x6 matrix keypad 3GPP Release 13 AT commands Neoway extended commands PDU, TXT Data PPP, RNDIS, ECM Protocol TCP, UDP, MQTT, FTP, HTTP/HTTPS, SSL, TLS Certification RoHS , CE approval * means under development. Copyright © Neoway Technology Co., Ltd...

  • Page 15: Reference Standards

    N715-EA Hardware User Guide Chapter 3 Reference Standards 3 Reference Standards N715-EA is designed by referring to the following standards: 3GPP TS 36.521-1 V13.0.0 User Equipment (UE) conformance specification; Radio transmission ⚫ and reception; Part 1: Conformance Testing 3GPP TS 21.111 V13.0.0 USIM and IC card requirements ⚫...

  • Page 16: Module Pins

    Chapter 4 Module Pins 4 Module Pins There are 148 pins on N715-EA and their pads are introduced in 76-pin LCC + 72-pin LGA package. It supports interfaces including power supply, USB, UART, USIM, PCM, ADC, I2C, and SDIO. 4.1 Pad Lay-out The following figure shows the pad layout of N715-EA.

  • Page 17: Pin Descriptions

    1.62 V - 1.98 V (type: 1.8 V)/2.9 V - 3.3 V (type: 3 V) =0.9V =0.9V DD_P1 DD_P1 DD_P1 DD_P1 =0V~0.1V =0V~0.1V DD_P1 DD_P1 SDIO1 P2: 1.8V/3.0V 1.8 V level feature: 3.0 V level feature: Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 18: Table 4-2 Pin Descriptions

    18, 30, 35, 38, 41, 43 - 45, 47, 73, 77 - 92 grounded. Control interfaces Active low; used to reset the module. RESET_N Module Reset =0.5 V ILmax This pin is connected to VBAT through Copyright © Neoway Technology Co., Ltd. All rights reserved.
  • Page 19 UART ready to send communications UART1_CTS UART clear to send FW in open version: used for data UART1_DTR UART data terminal ready transmission. UART1_RI UART ring indicator UART1_DCD Carrier detect output Copyright © Neoway Technology Co., Ltd. All rights reserved.
  • Page 20 = 50 mA O max USIM2_RESET USIM2 reset Connecting this pin to USIM2_VCC through a 4.7 kΩ pull-up resistor is USIM2_DATA USIM2 data input and output required. USIM2_CLK USIM2 clock output Copyright © Neoway Technology Co., Ltd. All rights reserved.
  • Page 21 Leave this pin open if unused. PCM_DIN PCM data input Leave this pin open if unused. PCM_DOUT PCM data output Leave this pin open if unused. PCM_CLK PCM clock Leave this pin open if unused. Copyright © Neoway Technology Co., Ltd. All rights reserved.
  • Page 22 Chip select signal of the slave SPI_CS_N device LCD interfaces LCD_TE LCD frame synchronization Leave this pin open if unused. LCD_SPI_RS LCD register selection Leave this pin open if unused. Copyright © Neoway Technology Co., Ltd. All rights reserved.
  • Page 23 Camera analog power Disabled by default and after enabled, = 2.8 V it outputs a 2.8 V voltage. CAM_DVDD Camera digital power supply = 1.8 V Disabled by default and after enabled, Copyright © Neoway Technology Co., Ltd. All rights reserved.
  • Page 24 Class D: 800 mW@4.2V, with an 8 Ω load. MIC_N MIC input channel - MIC_P MIC input channel + =2.2 V - 3 V, MIC_BIAS Microphone bias power supply =2.2 V norm Copyright © Neoway Technology Co., Ltd. All rights reserved.
  • Page 25 Key 3 of inputting Leave this pin open if unused. KEYIN4 Key 4 of inputting Leave this pin open if unused. KEYIN5 Key 5 of inputting Leave this pin open if unused. Copyright © Neoway Technology Co., Ltd. All rights reserved.
  • Page 26 Real Time Clock Power supply V= 2.8 V - 3.2 V Interrupt pin for PSM wakeup Active high PSM_EXT_INT VRTC power domain Setting this pin high externally Leave this pin open if unused. Copyright © Neoway Technology Co., Ltd. All rights reserved.
  • Page 27 Used for function extension or the function not open to users. These RESERVED 97, 144 RESERVE pins might have different functions. Leave these pins open. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 28: Application Interfaces

    Chapter 5 Application Interfaces 5 Application Interfaces N715-EA provides power, control, communication, peripherals, audio, video, and RF interfaces to meet the functional requirements of customers in different application scenarios. This chapter describes how to design each interface and provides reference designs and guidelines.

  • Page 29: Figure 5-1 Voltage Drops Of The Power Supply

    The power supply design of the N715-EA module is determined by the power input voltage. The designs are classified by power input voltage as follows: Supports the 3.4 V - 4.2 V power input (typical value: 3.6 V, supplied by a battery)

  • Page 30: Figure 5-2 Recommended Design 1

    VBTA pins to filter out high-frequency jamming. The following circuit design is recommended to control the power supply. Figure 5-3 Recommended design 2 VBAT 0.1uF 22uF 100kΩ 0.1uF 100pF 33pF 100uF 10uF 10kΩ PWR_EN 4.7kΩ 47kΩ Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 31: Figure 5-4 Recommended Design 3

    Keep the placement of the bypass capacitors (C4, C5, C6, C7) of low-ESR close to the module ⚫ to filter out high-frequency jamming from the power supply. Recommended 5.5 V to 24 V input design: Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 32: Figure 5-5 Recommended Design 4

    PCB wires. The bypass capacitor must be placed close to the power supply pin of the module to filter out ⚫ high-frequency noise signals in the power supply. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 33: Vdd_1P8

    It is recommended that VDD_1P8 is used for voltage-level translation only and an ESD protector should be added. N715-EA provides one VDD_1P8 output. It can provide the 1.8 V voltage and the maximum output current is 50 mA.

  • Page 34: Figure 5-6 Reference Design Of Power-On Controlled By A Button

    Power-on controlled by PWRKEY_N The following show two recommended reference designs of power-on controlled: Figure 5-6 Reference design of power-on controlled by a button VBAT_BB 20kΩ 470Ω PWRKEY_N Main chip 10nF N715-EA Module Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 35: Figure 5-7 Reference Design Of Power-On Controlled By An Mcu

    After the module is switched on, it needs to perform initialization process untill the pin state is stable, and during the process, do not perform other operations on the module. The following figure shows the power-on process: Figure 5-8 Power-on process VBAT T>2s PWRKEY_N Active Inactive UART Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 36: Power-Off

    Two methods are available to power off the module: hard power-off and soft power-off. Hard power-off: power-off controlled by PWRKEY_N ⚫ Soft power-off: power-off by AT command ⚫ Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 37: Reset

    RESET_N is used to reset the module. When the module is in power-on mode, forcing a low pulse at RESET_N for more than 50 ms can reset the module. Figure 5-13 shows the reset process. The following show two recommended reference reset designs of N715-EA: Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 38: Figure 5-11 Reference Design For Reset By Using A Button

    Figure 5-12 Reference design for reset controlled by an MCU VBAT_BB 20kΩ RESET_N 0Ω Main chip N715-EA Module 4.7kΩ 47kΩ 10nF The following figure shows the reset process of the N715-EA module: Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 39: Peripheral Interfaces

    USB_ID Reserved N715-EA can implement program download, data communications, and debugging through the USB interface. The USB of N706 only supports slave mode. Figure 5-14 shows the recommended USB interface circuit. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 40: Uart

    90 Ω. The cable from the USB host to the module must be isolated from other signal cables with ground surrounded. 5.3.2 UART Signal Function description Remarks UART1_RXD UART data input FW in standard version: used for AT UART1_TXD UART data output Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 41: Figure 5-15 Reference Design Of Uart Interface

    Use for module debugging DEBUG_UART_TXD DEBUG data output N715-EA provides three UART interfaces, two of which support hardware flow control. They support 1.8 V level and baud rates up to 921600 bps. The following figure shows recommended design of UART interface.

  • Page 42: Figure 5-16 Recommended Voltage-Level Translation Circuit1

    If the serial port baud rate is less than or equal to 115200 bps, design the serial port TXD and RXD by referring to recommended voltage-level translation circuit 2. As shown in Figure 5-17. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 43: Figure 5-17 Recommended Voltage-Level Translation Circuit 2

    − level conversion circuit in some cases. Single-triode Voltage-Level Translation Circuit ⚫ Design the serial port pins CTS/RTS/DCD/RI by reference to recommended voltage-level translation circuit 3, as shown in Figure 5-18. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 44: Usim

    The base voltage of the transistor is the lower voltage between both sides. − 5.3.3 USIM Signal Function description Remarks USIM1_VCC USIM1 power output 1.8 V/3.0 V (self-adaptive) USIM1 data input and Connecting this USIM1_DATA output USIM1_VCC through a 4.7 Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 45: Figure 5-19 Reference Design Of The Usim Card Interface (Normally Closed Type)

    USIM2_CLK USIM2 clock output N715-EA provides 2 USIM card interfaces, self-adaptable to 1.8 V/3.0 V USIM cards, of which the USIM1 interface supports the hot-swap function. USIM1 is the default USIM interface. Figure 5-20 shows the reference design of the USIM card interface.

  • Page 46: Figure 5-20 Reference Design Of The Usim Card Interface (Normally Open Type)

    10 pF. No capacitors are placed on them by default in design. Please adjust it according to the actual debugging results. N715-EA supports USIM detection. USIM_DET is a 1.8 V interrupt pin. The USIM detection ⚫...

  • Page 47: Sdio

    The module provides one SDIO2 interface, which can be used to connect the external WLAN chip. With the high-speed nature of the SDIO2 data signals, careful attention must be paid to PCB layout and design to maintain adequate signal integrity. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 48: Sdcard (Signal Multiplexing)

    WAKEUP_IN SDIO1_DATA3 AP_READY SDIO1_DET I2C_SDA SD interface supports 1.8 V/3.0 V dual voltages and a maximum clock frequency of 33.33 MHz. The following shows the reference design of the SDC interface. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 49: Pcm

    SD_VDD is used to drive SD card peripherals ⚫ N715-EA supports SD card detection, which is triggered by a 1.8 V interrupt pin. The SD ⚫ detection circuit works by checking the voltage-level across the USIM_DET pin before and after a SD card is inserted.

  • Page 50: Spi

    PCM_DOUT PCM_IN Schematic Design Guidelines If the levels of N715-EA and Codec do not match, add a voltage-level translation circuit as required by referring to the description of voltage-level translation circuit in section 5.3.2 . PCB Design Guidelines: Reduce the cross routing between the PCM signal cable and other cables. If cross routing ⚫...

  • Page 51: I2C

    I2C_SCL I2C clock VDD_1P8. N715-EA provides one 1.8 V I2C interface, supporting only master mode and speed rates up to 3.4 Mbps. The following shows the reference design of the I2C interface. Figure 5-25 I2C reference design VDD_1P8 1.8kΩ...

  • Page 52: Audio Interfaces

    N715-EA Hardware User Guide Chapter 5 Application Interfaces 5.4 Audio Interfaces N715-EA provides many audio input/output interfaces to meet your demands for the audio function in different environments. 5.4.1 Analog Audio Input Signal Function description Remarks MIC_N MIC input channel -...

  • Page 53: Analog Audio Output

    Speaker output - Class D: 800 mW@4.2V, with a 8 Ω load The external power amplifier should be added as required. The following shows the reference design of the audio interface: Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 54: Figure 5-27 Reference Design Of Audio Interface In Ear/ Spk Differential Mode

    Keep audio traces far away from antenna to reduce jamming. Avoid parallel layout between ⚫ power supply traces and audio traces. It is important to route the audio signal traces as differential pairs. ⚫ Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 55: Headset Interface

    N715-EA headset interface pinouts: Table 5-2 Headset audio pin description Signal Function description Remarks Route traces between the left right sound AMP_VCOMP Headset-dedicated ground channels of the headset, connect to the GND of the Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 56: Figure 5-29 Reference Design Of The Headset Interface

    HP_DET Headset plug detect headset single-ended input HEADMIC_IN_DET channel and insertion detection The following figure shows the reference design of the headset interface. Figure 5-29 Reference design of the headset interface Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 57: Figure 5-30 Headphone Interface Diagram

    There are two commonly used headphone jack (3.5 mm) pin definitions Figure 5-30 Headphone interface diagram Pin definition A: Pin definition B: 1—MIC 1—GND 2—GND 2—MIC 3—R 3—R 4—L 4—L 5—HPH_DET 5—HPH_DET Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 58: Video Interfaces

    ⚫ 5.5 Video Interfaces 5.5.1 LCD N715-EA provides an LCD-dedicated SPI interface, supporting frame rates up to QVGA@30fps. The following shows the LCD interface description. The following shows the LCD interface pin description. Table 5-3 LCD interface pin description Function...

  • Page 59: Camera

    Main antenna pin 5.6.1 ANT_MAINAntenna Interfaces The antenna interface of the N715-EA requires the 50 Ω impedance feature. The impedance of the cable from the module interface to the antenna needs to be kept at 50 Ω impedance to ensure RF performance.

  • Page 60: Figure 5-31 L-Type Network

    Add an ESD protector if the antenna might generate static electricity. The protector can be a ⚫ ESD diode with a junction capacitance of less than 0.5 pF. Ensure that the reverse breakdown voltage of the ESD greater than 10 V (above 15 V is recommended). Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 61: Ant_Wlan_Bt

    5.6.2 ANT_WLAN_BT The 42 pin of the N715-EA module is shared by the WLAN and Bluetooth antennas. It has a characteristic impedance of 50 Ω. For the schematic design and the PCB design of the WLAN antenna and Bluetooth antenna interface, see the requirements in section 5.6.1 “ANT_MAIN”.

  • Page 62: Figure 5-35 Murata Rf Connector Encapsulation Specifications

    The module works in a wide frequency range, but it is difficult for PCB antennas or ceramic antennas to cover a wide frequency. Therefore, this connection method is recommended only for 2.4 GHz Wi-Fi or BT/ BLE antennas. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 63: Figure 5-37 Antenna Layout

    Figure 5-38 shows the layout for the area between the antenna and ground that is marked as "5" in Figure 5-37. Figure 5-38 Layout around the antenna For more details, refer to the antenna manuals and other documents. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 64: Gpio Interfaces

    5.7 GPIO Interfaces Signal Function description Remarks GPIO4 General Purpose Input Output GPIO5 General Purpose Input Output N715-EA provides 2 GPIO interfaces, all of which have the interrupt function. 5.8 Multi-Function Interfaces Table 5-4 Pin definition description Function Function GPIO Remarks (default)

  • Page 65: Other Interfaces

    NET_LIGHT interface connected, should leave these pins open. N715-EA provides 18 pins with multiplexing function. For more details, see section 4.2 If the signal multiplexing table is required, contact Neoway. 5.9 Other Interfaces 5.9.1 ADC The module provides four ADC channels and their input voltage ranges from 0 V to VBAT. The ADC interfacea support the highest precision of 12bit and it can be used for temperature detection and other checks.

  • Page 66: Figure 5-39 Process Of Entering Into Sleep Mode

    Sleep mode MCU detects information from UART? MCU pulls SLEEP pin to high Enable UART and process services Complete service Wait till services procesing? are processed MCU pulls SLEEP pin to Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 67: Figure 5-41 Outgoing Call Service Process

    The following shows the process of exiting from sleep mode: Figure 5-42 Process of existing from sleep mode Sleep mode MCU pulls SLEEP high UART enabled AT+ENPWRSAVE=0 Forbid sleep mode Exits from sleep mode Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 68: Status Indication

    Do not use the indication pin to drive the LED indicator directly since the pin outputs a high level of 1.8 V. It is recommended to drive the LED indicator by controlling a triode. Figure 5-43 Driving LED indicator with a triode N715-EA Module 1kΩ R1 4.7kΩ NET_LIGHT 47kΩ Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 69: Usb_Boot

    USB_BOOT Forcible download/upgrade control pin N715-EA provides a USB_BOOT pin. During development, USB_BOOT can force the module to boot from USB port for firmware upgrade. To force the module into emergency download mode, you can connect USB_BOOT of the module to VDD_1P8 through a pull-up resistor in a short time during the module’s power-on process.

  • Page 70: Psm Interface

    5.9.6 PSM Interface Signal I/O Function description Remarks Interrupt pin for PSM wakeup PSM_EXT_INT 116 DI Setting this pin high externally can wake up the module from PSM. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 71: Electrical Characteristics And Reliability

    Chapter 6 Electrical Characteristics and Reliability 6 Electrical Characteristics and Reliability This chapter describes the electrical characteristics and reliability of the N715-EA module, including the input and output voltage and current of the power supply, current consumption of the module in different states, operating and storage temperature range, and ESD protection characteristics.

  • Page 72: Temperature Characteristics

    ± 15 kV ANT interface ± 8 kV ± 15 kV Cover ± 8 kV ± 15 kV Test data in the above table is obtained from tests performed using a N715-EA EVB. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 73: Rf Characteristics

    N715-EA Hardware User Guide Chapter 7 RF Characteristics 7 RF Characteristics N715-EA supports GSM, FDD-LTE (Cat.1), TDD-LTE (Cat.1) network modes and the Wi-Fi, RX, and BT wireless connection function. 7.1 Operating Band Table 7-1 N715-EA operating bands Operating band Uplink...

  • Page 74: Table 7-3 Rf Rx Sensitivity Of N715-Ea

    10 MHz, the modulation mode is QPST and RB is set according to the protocol. On no-shielded environments, deviations may exist in the receiver sensitivity of some individual bands due to the interference. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 75: Wlan/Bt Characteristics

    Receiving sensitivity ≤ -88 dBm 802.11b (2.4G) 1/2/5.5/11 Mbps ≤ -88 dBm 3.2 dBm ≤ -88 dBm 2HD5 1 dBm Bluetooth ≤ -80 dBm 3DH5 1 dBm ≤ -94 dBm BLE/1 Mbps Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 76: Mechanical Characteristics

    N715-EA Hardware User Guide Chapter 8 Mechanical Characteristics 8 Mechanical Characteristics This chapter describes mechanical characteristics of the N715-EA module. 8.1 Dimensions Figure 8-1 N715-EA top and side view dimensions (unit: mm) Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 77: Label

    N715-EA Hardware User Guide Chapter 8 Mechanical Characteristics 8.2 Label The N715-EA label is laser etched, and can withstand a high temperature of 260°C. The following shows the label format of N715-EA. The picture above is only for reference. 8.3 Packaging N715-EA adopts the SMT method for oven soldering.
  • Page 78 N715-EA Hardware User Guide Chapter 8 Mechanical Characteristics module N715-EA Tape Dimensions Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 79: Moisture Sensitivity Level

    Reel Dimensions 8.3.2 Moisture Sensitivity Level N715-EA modules are Moisture Sensitive Devices (MSD) in accordance to the IPC/JEDEC specification.. The Moisture Sensitivity Level (MSL) relates to the required packaging and handling precautions. The MSL standard is available in IPC/JEDEC J-STD-020.
  • Page 80 Bake it before mounting the module. The baking conditions depend on the moisture degree. It is recommended to bake the module at temperatures higher than 120 degrees for more than 12 hour Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 81: Mounting

    N715-EA Hardware User Guide Chapter 9 Mounting 9 Mounting This chapter describes the module PCB package and application PCB package of N715-EA, as well as the key points of SMT related technology. 9.1 PCB Package Figure 9-1 Bottom view of N715-EA PCB package (unit: mm)

  • Page 82: Application Pcb Package

    Chapter 9 Mounting 9.2 Application PCB Package N715-EA adopts the 76-pin LCC + 72-pin LGA form package. The recommended application PCB package is as follows: To achieve higher yield during module production, it is recommended that the distance between other components on the PCB board and the module pads be at least 3 mm to avoid the risk of tin connection when using stepped stencil.

  • Page 83: Stencil

    220°C for more than 45 seconds and the peak temperature reaches 240°C. 9.5 SMT Oven Temperature Profile Neoway will not provide warranties for heat-responsive element abnormalities caused by improper temperature control. Thin or long PCB might bend during SMT. So, use loading tools during the SMT and reflow soldering process to avoid poor solder joint caused by PCB bending.

  • Page 84: Figure 9-3 Oven Temperature Profile

    245°C (depending on the type of the solder paste), and heat the module till the solder paste is melted. Then remove the module using tweezers. Do not shake the module at high temperatures while removing it. Otherwise, the components inside the module might get misplaced. Copyright © Neoway Technology Co., Ltd. All rights reserved.

  • Page 85: Abbreviations

    File Transfer Protocol FTPS FTP Secure GPIO General Purpose Input Output GPRS General Packet Radio Service EGSM Enhanced GSM 3GPP 3rd Generation Partnership Project Input/Output Image Signal Processor Leadless Chip Carriers Copyright © Neoway Technology Co., Ltd. All rights reserved.
  • Page 86 Quarter Video Graphics Array Random Access Memory Radio Frequency Read-only Memory Real Time Clock Speaker Time Division Duplex UART Universal Asynchronous Receiver-Transmitter Uplink Universal Serial Bus USIM Universal Subscriber Identity Module VBAT Battery Voltage Copyright © Neoway Technology Co., Ltd. All rights reserved.

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