Operating Instructions; Introduction; Setup Commands - LeCroy 8901A Operator's Manual

OPERATING INSTRUCTIONS
INTRODUCTION
The 8901A provides GPIB control of all Instruments in a
CAM AC mainframe.
Waveform Catalyst
User Programming
SETUP COMMANDS
Transfer Mode Commands
LeCroy WAVEFORM CATALYST system provides digital stor
age scope operation of one or more CAMAC mainframes using
keystroke commands on a properly configured IBM PC or com
patible. No programming of the 8901A is required in this in
stance. See WAVEFORM CATALYST Operator's Manual.
The GPIB controller may send the 8901A two types of com
mands. The first type, setup commands, program the 890lA,
while the second type, CAMAC commands, is used by the
8901A to program the operation of instruments in the main
frame.
The setup commands are used to program the 8901A for the
desired transfer mode, and SRQ (service request) response. All
of these commands are single bytes; that is, the 890lA must
first be addressed to Listen, followed by the command byte.
By sending the appropriate command (see Table 1), the 8901A
can be programmed to return 8, 16, or 24-bit data words in
either single or block word transfers, whenever it executes a
CAMAC cycle. In the case of multiple byte transfers, the least
significant byte is sent first (if the byte jumpers are set to nor
mal - see Chapter 3 for more details). A CAMAC cycle is
executed every time the 890lA is addressed to Talk by the
GPIB controller. In normal non-block mode, after the 1, 2, or
3 data bytes have been read, a status byte is sent containing the
X response (least significant bit) and the Q response (bit 2)
along with the GPIB EOI status line asserted to indicate that this
is the end of the data to be transferred.
If a "block mode" read command had been sent, the 8901A
will automatically initiate another CAMAC cycle when the GPIB
controller has finished reading the current data word. CAMAC
cycles will continue to be executed until Q = 0 or the GPIB
controller terminates the transfer. There are two block modes
in the 8901A. The first one, "block read" is provided for mod
ules which cannot read out at full CAMAC speed (1 MHz). In
this mode, a 35 p.sec delay (plus GPIB overhead) is added be
tween each CAMAC cycle to slow down the transfer rate. The
other mode, "high speed block read" runs as fast as the data is
read out over the GPIB, up to 2 p,sec per cycle.
When block mode transfers are terminated normally (data read
until Q=0) two additional bytes are sent to the GPIB controller.
The first one is the status byte followed by a zero byte and EOI.