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harman/kardon
PRELIMINARY DATA SHEET
VDD_CORE
VSS_CORE
VSS_CORE
SPDIF_OUT5
VSS_IO
VDD_IO
I2S_IN1_CL
I2S_IN1_WS
I2S_IN1_D1
102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79
I2S_IN1_D2
103
I2S_IN1_D3
104
I2S_IN1_D4
105
I2S_IN3_CL
106
I2S_IN3_WS
107
I2S_IN3_D
108
I2S_OUT1_D4
109
I2S_OUT1_D3
110
I2S_OUT1_D2
111
I2S_OUT1_D1
112
I2S_OUT1_WS
113
I2S_OUT1_CL
114
VDD_CORE
115
VDD_CORE
116
VSS_CORE
117
VSS_CORE
118
VSS_IO
119
VDD_IO
120
S_OUT2_MCLK
121
I2S_OUT2_CL
122
I2S_OUT2_WS
123
I2S_OUT2_D
124
SPDIF_OUT3
125
SPDIF_OUT2
126
SPDIF_OUT1
127
SPDIF_OUT4
128
1
2
3
4
5
SPDIF_IN3
SPDIF_IN1
SPDIF_INREF
SPDIF_IN2
SPDIF_IN4
VDD_SPDIF
VSS_SPDIF
VSS_CORE
VSS_CORE
Fig. 4–6: MAP 5601M in PMQFP128-2 package
Micronas
ADR_SEL
VSS_PLL
VDD_PLL
GPIO1
GPIO0
CLKO
I2S_IN2_D
I2S_IN2_WS
I2S_IN2_CL
VDD_CORE
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
VDD_CORE
VDD_CORE
I2S_DEL_OUT
I2S_DEL_IN
I2S_DEL_WS
I2S_DEL_CL
SPI_CL
SPI_CS
SPI_DIN
SPI_DOUT
April 23, 2008; PD000200_001EN
SCL
SDA
VSS_DIG
VDD_DIG
VALID_4
VALID_3
VALID_2
78 77 76 75 74 73 72 71
MAP 5601M
25 26 27 28 29 30 31 32
LINE_IN2L
LINE_IN1R
LINE_IN1L
NC
NC
VSS_IO
VDD_IO
HS 2X0/230 Service Manual
MSP-M/MAP-M
VALID_1
SHUTDOWNQ
RESETQ
NC
NC
NC
VDD_XTAL
VSS_XTAL
NC
NC
NC
70 69 68 67 66 65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
33 34 35 36 37 38
LINE_IN7R
LINE_IN7L
LINE_IN6R
LINE_IN6L
LINE_IN5R
LINE_IN5L
LINE_IN4R
LINE_IN4L
LINE_IN3R
LINE_IN3L
LINE_IN2R
NC
XT2
XT1
TEST
PWM_4P
PWM_4M
VSS_PWM
VDD_PWM
PWM_3P
PWM_3M
PWM_2P
PWM_2M
PWM_1P
PWM_1M
MAIN_OUT6
MAIN_OUT5
SGND_AU
VREF_AU
MIC_INL/LINE_IN8L
MIC_INR/LINE_IN8R
VSS_AU
VDD_AU
LINE_OUT3R
LINE_OUT3L
LINE_OUT2R
LINE_OUT2L
LINE_OUT1R
LINE_OUT1L
137
Page 34 of 73
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