Fluke 9000A-8080 Instruction Manual page 17

8080
SIGNAL NAME
OBIN Line
WR Line
READY Line
WAIT Line
INT Line
INTE Line
RESET Line
HOLD Line
HLDA Line
3-2
Table 3-1. 8080 Signals (cont)
DESCRIPTION
The SYNC output permits synchronization of
external logic with status information present on the
data lines.
The OBIN line is made output high to indicate that
the 8080 is ready to read data via the data lines from
either memory or an 1/0 device. OBIN may be used
as a data input strobe.
The WR line is made output low when data on the
data bus is stable, indicating the 8080 is ready to
write data to either memory or an 1/0 device. The WR
line may be used as a write strobe.
The READY line is an input which, when placed at a
logic low level, causes the 8080 to enter a wait state.
During the wait state, the 8080 inserts clock pulses
to extend cycle time as required by the external logic
selecting the wait state.
The WAIT line is made output high during the wait
state caused by an input to the READY line.
The INT line is an input which, when made a logic
high level, permits the external interrupt of the
8080.
The INTE line is made output high to indicate that
interrupts are enabled by the 8080. The INTE output
is made low when an interrupt is acknowledged.
The RESET line is an input which, when placed at a
logic low level for a minimum of three clock periods,
resets the program counter and other registers to
zero.
The HOLD line is an input which, when placed at a
logic high level, causes the 8080 to halt at the
completion of the current instruction. During the
HOLD state, the 8080 relinquishes control of the
system bus by floating the address and data lines to
a high impedance state. External control of the
system bus is necessary during OMA (direct
memory access) operations.
The HLDA line is made output high when the 8080
acknowledges a HOLD input and floats the system
bus to a high impedance state.