Usb - Cherry RINGNECK SOM-PX30-uQ7 User Manual

Power efficient system-on-module with quad-core arm featuring the rockchip px30 application processor
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12.6 USB

The RINGNECK SOM-PX30-uQ7 CPU has 2 USB 2.0 controllers. A USB 2.0 hub provides two additional USB 2.0
ports for a total of four.
The routing of Qseven signals to CPU and/or hub port is shown below.
Qseven Port #
USB_P0
USB_P1
USB_P2
USB_P3
The lsusb -t command shows the USB topology in a tree view and is highly recommended. Its output is dis-
cussed below, for a RINGNECK SOM-PX30-uQ7 module without additional devices connected:
-
Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ohci-platform/1p, 12M
-
Bus 02.Port 1: Dev 1, Class=root_hub, Driver=ehci-platform/1p, 480M
*
Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
Port 1: Dev 3, If 0, Class=Mass Storage, Driver=usb-storage, 480M
Port 3: Dev 4, If 0, Class=Mass Storage, Driver=usb-storage, 480M
Port 4: Dev 6, If 0, Class=Vendor Specific Class, Driver=ucan, 12M
-
Bus 01.Port 1: Dev 1, Class=root hub, Driver=dwc2 1p, 480M
The CAN controller is connected to Port 4 on the hub.
The USB hub can be held in reset, if required. This disables all USB ports connected to the hub. The reset
signal routing is shown below:
v1.3.1
Page 50
Speed
USB 2.0 Hi-Speed
USB 2.0 Hi-Speed
USB 2.0 Hi-Speed
USB 2.0 Hi-Speed
Hub signal
CPU Pin
USBHUB_RESETn
GPIO0_A5
Connected to
Notes
Hub
CPU
OTG Port
Hub
Hub
Linux GPIO #
5

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