Pioneer DVL-90 Service Manual page 122

DVL-90, DVL-700
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[Analogpowerspphy SSCS
[Terminal to connect the cuent source reference resistor ofthe operational amplifier for ighal serve =
bomb GND a et ee
[AID convererinput moniortemmimal SSCS
[Terminal to connect the low-pass filer @pactorforRFDCigpat SSCS
RF signal input. Input range: 2.15 to 5.0 V (when Vpp = AVpp = 5.0 V).
Tracking error signal input. Input range: 2.5~1.0 V (when Vop = AVpp = 5.0 V).
Thread-error signal input. Input range: 2.5~1.0 V (when Vpp = AVpp = 5.0 V).
Focus-error signal input. Input range: 2.5~1.0 V (when Vpp = AVpp = 5.0 V).
Mid-point voltage input terminal.
Filter output for master PLL
Filter input for master PLL.
Charge-pump output for master PLL.
VCO control voltage input for master.
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Mommie
[Asymmetrical creul constant canemispat SSS
[Asymmetrical comparison volage input.
EFM full-swing output (L= Vss, H = Vpp).
Analog power supply.
[Peblpremny
[Asymmetrical circuit ONOFF(L=OFRH=ON) SSCS
| Andio data output mode switching imput (= serial ouput H=panlieloupa).—————SSCSCSCS~SS
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ASYO
AVpp
Vpp
ASYE
PSSL
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[48-bit slot D/A interface, Word clock @=2Fs). SSCS
ERCK [48-bit slot D/A interface. OR clock @=F5).———
DA16 i
DA15 i
DA14
DA16 output when PSSL = 1. Serial data of 48-bit slot when PSSL = 0.
DA15 output when PSSL = 1. Bit clock of 48-bit slot when PSSL = 0.
DA13 output when PSSL = 1. Bit clock of 64-bit slot when PSSL = 0
AL2 DA12 output when PSSL = 1. LR clock of 64-bit slot when PSSL = 0.
pay [AIO output when PSSL = 1. KUGF output when FSSL=0———SSSSCSCSCSCSCSCSCSCSCSCSCSCSCSCSC
[BAO output when PSS = 1. XPLCK ouput when PSSL=O.__——SSSSSSSSSSSSSSSS—
[AOS output when PSSL = i. GFS output when PSSL=0——SSS
[DAGT outpat when PSSL = 1. RECK ouput when PSSL=0_—SSSCSCSCSCSCSCSCSCSCSCSCSCSCSCS
[DA0S output when PSSL = 1. C2PO ouput when PSSE =O.
[DAOM output when PSSL= 1 MNTS output when PSSL=0. SSS
[DA03- ouput when PSSL =I. MINTZ ouput when PSSL=O.————SSSSSCSCSCSSSSCSS
(DAO? output when PSSL= 1. MNTI output when PSSL=0. SSS
[DAOI output when PSSL= 1. MNTO ouput when PSSL=0.——SSCSCSCSCSCSCSCSCSCSCSCSCSSC
_
X'tal oscillation circuit input. 16.9344 MHz or 33.8688 MHz input.
Xtal oscillation circuit output.
X'tal selective input terminal. The system is set to L when X+tal is 16,9344 MHz, and H when 33,8688 MHz (during
normal playback).
Reference clock input terminal for digital servo block
2/3 divided output for Terminals 62 and 63. Variable pitch does not change the output
DAII output when PSSL= 1. GTOP output when PSSL= 0.
1/4 divided output for Terminals 62 and 63. Variable pitch does not change the output.
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Digital GND.
[1659344 Mie output. Changes simultaneously with variable pitch during normal payback).
[Digisl-Ou ONIOFF contol weminel @=OFRH=ON) SSCS
[Digia-Ououpwtiemindd SSS
[Emphasis mode output ofthe dsc played back (L=no emphasis, = emphasis) ————SSSCSCSCSCSCSCS
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[Subcode sync ouput terminal (The system sets to H when either subcode sync SO orSiisdaleced)
Serial output of Sub-P to Sub W.
DA14 output when PSSL = 1. Serial data of 64-bit slot when PSSL = 0.
DAOS output when PSSL = 1. XRAOF output when PSSL = 0.
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