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MA-990
Pin Assignment (Top View)
POO
Pot
PO2
P03
P10
Pit
P12
P13
Slo/P20
Soo/P2t
SCKo/P22
INTO/P23
INTI/P30
POUTO/P31
POUT1/P32
HOLD/P33
P40
Pat
TEST
Vss
osct
PE1/TRB
PEO/TRA
VDD
PD3/CMP3
PD2/CMP2
PD1/CMP1
PDO/CMPO
PC3/Vref1
PC2Vret0
P63/PIN1
P62/SCK1
P61/SO1
P6O/SH_
P53/INT2
P52
PS1
P50
P43
P42
RES
Osc2
&
si
ae} +[rmens [Semncio7 ES
:
MPX
;
1
6) S01
Pin Assignment (Top View)
Bhecaesterenenes
Omooononanor>
radcatatce
SISISIRES
(3
DREAD
A4
WAT
A3
ASO.
A2
BCKO
Al
LRCKO
AO
FS3840
SAK
ASI
SADV
BCKt
SICK
LRCKI
si
FS3844
SIRO
SELC
vss3
VDD1
VDD3
OSsci
P4
osce2
P3
vsst
P2
vss2
P41
RES
Po
SAIF
ADM3
SAOF
ADMVDD
TEST6
ADM1
TESTI
ADMVSS
TEST2
TEST3
TEST4
20
ERIS
SSRI
ISIEIEIe
om
nd
nu
=
an
=
Pa SBABBE
BASSES
ESE
®a>r><t<se2e5375>E253929020
YS>r4uAaArtkartoat
ates
FO
ae"
g¢4"°@
Asa
fal
a
aa
a
<
<
<
ADM2
ADR3
ADRVDD
aT Tepe TT
uy
ye
uy
gy
Sequence Control
Loop Counter
: -
2)SCK1
G3X15) PIN1,POUT1
a
ALU/Shifter
DRAM Interface
LIFO
uP Interface
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