Kenwood TM-221A Service Manual page 8

TM-221A/E/ES
CIRCUIT DESCRIPTION
@ Reset backup circuit
Fig. 10 shows the reset backup circuit. When the
transceiver is turned ON, 3.0V is applied at the INT4
pin causing I|C3 to enter the backup mode.
Ci6
1C2 timing chart
Pin 1
Pin 3
Fig. 10 Reset and backup circuit
10
@ PLL data output
PLL data is supplied from pins P92 (CK), P91 (DT),
and P90 (RST) of the microprocessor. Fig. 11 shows
the data transfer format. Fig. 12 shows the data con-
figuration.
21 bit
CK
<a
MSB LSB
1S
Fig. 11 PLL data transfer format
frequency division 22] 21 | 24] 2°] 2+] 24 24
ratio A |
Main counter
'
ratio N {
Port setting, {oozes
comparison frequency ps ]o2]0s]o4
selection
&
a
Shift register
The 21-bit data is converted by the procedure below.
1. Frequency division ratio data A, N (17 bits)
F (RX display—10.695MHz) =
[(N X 128) + A] X 10.24MHz/ref (K, M)
F (RX display — 10.7MHz) =
L(N X 128) + A] X12.8MHz/ref (T, W)
N : Frequency division ratio of main 10-bit counter
A: Frequency division ratio of 7-bit pulse swallow counter
2. Comparison frequency (ref) selection (2 bits)
D2
5,10, 15, 20 or 25k Hz steps
L
Phase comparison frequency
3. Switch selection (2 bits}
ey |
o3 [D4 | swi [swe |
Fig. 12 PLL data configuration