Yaesu FT-901DM Maintenance Service Manual page 52

COUNTER UNIT (PB-1729)
DISPLAY UNIT (PB-1730)
The 5.0 - 5.5 MHz VFO signal is amplified by
Q2901 (3SK40M) and fed through source follower
Qro02 (2SKI9GR) to a balanced mixer Q2903
(SN76514N), where the signal is heterodyned with
either an 18.0 MHz or 18.5 MHz signal, producing
either a 12.5 - 13.0 MHz or 13.0 - 13.5 MHz
signal. The oscillator Qj997 (2SC945) generates
an 18.0 MHz signal for the 160, 80, 10B, and
10D bands, and Qyo9o, (2SC945) generates an
18.5 MHz signal for the 40, 20, 15, 10A. 10C,
and WWV/JJY (15 MHz) bands.
The oscillators are controlled by Q3905 (2SC945)
and Qo09 (2SA733) in accordance with the
band in use. The output from the balanced mixer
is fed through amplifiers Q3904 and Q2zo95 (both
2SC785) to the counter gate Q39,3 (SN74LSOON).
The MHz display is programmed by the diode
matrix Qz9:9 (MSL980Y7) and Q25,,; (MSL
980Y4). The output from Qjo:9 and Qroyy is
TECHNICAL NOTES
fed to the up/down counter Qj92; and Qr920
(both F40192); the output from the up/down
counter is fed to drivers Q3923 and Q2922 (both
MSMS561) and then to the display LED's DS3o0;
and DS3002 (HP5082 - 7740).
The crystal oscillator/divider Qy9,;2 (MMS564)
generates a 655.36 kHz clock signal and produces
5 Hz gate pulses which are fed to the counter
gate Qr913.
The pulses which pass through the gate are fed
to the decade counter Qj9,;; (SN74LS90N),
which counts 10 Hz digits. The 10th pulse at
pin 12 of Qzox5 is fed to Qo9;3 (MM5501), which
counts 100 Hz, 1 kHz, 10 kHz, and 100 kHz
digits. The BCD output signal from Q29,3 is fed
through driver Qy9;7 (MSMS561) to the display
LED's DS3003 - DS3006 (HP-5082 - 7740).
Qso19 (MCI416P) works as a series of switches
operated by a timing signal delivered by Q2o18
to select the output of Q29,;7 which drives the
display LED's in a sequence of 100 Hz, 1 kHz,
10 kHz, and 100 kHz. -
[PB-I730 DISPLAY UNTTINO 30-7
IDSoI~6 HPSO62-7740
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