Yaesu FT-901DM Maintenance Service Manual page 51

TECHNICAL NOTES
A portion of the Qj299 output is rectified by
Dy219 and Dy229 (both 1N60); this rectified DC
voltage is amplified by DC amplifier Q,2,2 (2SC
181S5Y) to generate AGC voltage which controls
the gain of Qj209, thus obtaining unity signal
output when the band is changed.
PLL UNIT (PB-1709)
The sample signal from the VCO UNIT is fed to
the PLL mixer Qi192 (TA7310P), where the
sample signal is mixed with the heterodyne signal
(at 5.0 - 5.5 MHz) delivered from the XTAL
UNIT through buffer amplifier Q 4,9; (2SC
1815Y). The 5.0 - 5.5 MHz signal is fed through
amplifier Qy,93 (2SCI8ISY) to Qyyo6 (SN
75450B), where the signal waveform is shaped
prior to being supplied to a phase detector Q, 107
(MC4044P); here the phase of the signal is com-
pared with the phase of the signal delivered
through wave shaper Qy106, buffer Qi,95 (2SC
1815Y), and amplifier Q, ,94 (2SK19GR) from the
VFO UNIT.
Q:107 compares the phase of the two signals and
converts the phase difference into the VCV voltage
which controls the VCO frequency. Qi103 (2SC
373) acts as an active low pass filter to remove
ripples from the VCV voltage.
When the VCO is unlocked, Qi;99 (2SC1I815Y)
delivers the signal to prevent receive or transmit
action of the transceiver.
Qiiio (78L08) and Q,,;; (78LO5) are voltage
regulators.
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