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iC BLOCK DIAGRAM
Pin
2|
RFI
3}
RFO
4|
RF (—
5/
PD1
6]
PD2
7]
AGND
8|
E
Output to enable focus servo
operation. It is active with
comparator output set at High
level.
Load resistor connection (PNP
open collector).
Output of RF summing
amplifier is here input through
C coupling.
Output of RF summing
amplifier.
Eye pattern test point.
Inverted input of RF summing
amplifier. Feedback CR
connection between pins (3)
and (4).
Inverted input of RF 1-V
amplifier (1). Current input in
connection with PIN diode
B+D.
Inverted input of RF1-V
amplifier (2). Current input in
connection with PIN diode
AtC.
Ground for minor signal
analog system.
Inverted input of E 1-V
amplifier.
Current input in connection
with PIN diode E.
OV
V RFO
OV
OV
OV
OV
OV
10
11
12
13
14
15
16
17
18
19
—14—
FFB
GND
VEE
FE (+)
FE (—)
FE
TE
MIRR
HC
Function
Output of E 1-V amplifier.
Feedback CR connection
between pins (8) and (9).
Output of F 1-V amplifier.
Feedback CR connection
between pins (10) and (11).
Inverted input of F 1-V
amplifier.
Current input in connection
with PIN diode f.
Ground.
Negative power supply.
Non-inverted input of focus
error amplifier. CR connec-
tion for low pass filter.
Inverted input of focus error
amplifier.
Output of focus error
amplifier.
Feedback CR connection
between pins (15) and (16).
Output of tracking error
amplifier.
Output of mirror comparator
active at High level).
Load resistor connection (PNP
open collector).
Connection pin for mirror
hold capacitor.
bc
Volt
OV
OV
OV
OV
—5V
OV
OV
V FEO
V TEO
OV
—2V
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