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System Configuration
Clock for LG1154D
MAIN Clock(24Mhz)
8pF
XIN_MAIN
C100
8pF
XO_MAIN
C101
System Clock for Analog block(24Mhz)
OPT
PLL SET[1:0] : internal pull up
R100
33
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792 Mhz)
PLLSET1
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672 Mhz)
R101
33
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792 Mhz)
PLLSET0
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792 Mhz)
OPT
+3.3V_NORMAL
Jtag I/F
For Main
T32
0.1uF
OPT
R167
P100
33
12505WS-10A00
T32
1
TRST_N0
2
TDI0
3
TDO0
4
TMS0
5
TCK0
6
SOC_RESET
7
8
9
10
11
WebOS UHD HW Option
+3.3V_NORMAL
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BIT10
20131016 version
BIT(0/1)
DVB
ATSC
JP
00
TW/COL
North.AM.
01
CN/HK
KR
JP
10
BR
EU
11
AJJA
High
Low
BIT2
Resolution
FHD
UHD
BIT3
Support U14
U14
Non_U14
BIT4
D9 Model
D9
Non_D9
BIT5
URSA7/URSA9
URSA9
URSA7/URSA9P
BIT(6/7)
EU/CIS
AJJA
TW/COL
CN/HK
KR
North.AM
00
T/C
T/C
T/C
Default
ATSC_PIP
ATSC_PIP
01
T2/C/S2/ATV_EXT
T2/C_PIP
T2/C_PIP
ATV_SOC
ATV_SOC
T2/C
T2/C
10
T2/C
ATV_EXT
ATV_EXT
11
T2/C/S2/AT
T2/C/S2
High
Low
Display
OLED
LCD
BIT8
BIT9
Reserved
BIT10
Reserved
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
EEPROM_ST
IC102-*1
NVRAM
M24256-BRMN6TP
+3.3V_NORMAL
E0
1
E1
EEPROM_RENESAS
2
C103
IC102
E2
0.1uF
3
R1EX24256BSAS0A
Write Protection
VSS
4
- Low
: Normal Operation
A0
VCC
- High : Write Protection
1
8
EEPROM_ATMEL
IC102-*2
AT24C256C-SSHL-T
A1
WP
2
7
A0
1
A0'h
A2
SCL
3
6
A1
2
I2C_SCL5
AR102
A2
3
VSS
SDA
I2C_SDA5
33
4
5
GND
4
OP MODE[1:0]
"00" : Normal Mode
+3.3V_NORMAL
+3.3V_NORMAL
"01/10/11" : Internal Test mode
INSTANT boot MODE
+3.3V_NORMAL
"1 : Instant boot
"0 : normal
OPT
R133
33
(internal pull down)
OPM1
R134
33
INSTANT_BOOT
OPM0
OPT
BOOT_MODE0
INSTANT_MODE0
SOC_RESET
C108
0.1uF
D13_INT
EPHY_INT
R149
CAM_TRIGGER_DET
10K
H13_CONNECT
R151
10K
M_REMOTE_RTS
SOC_SPI1_MOSI
SOC_SPI1_MISO
SOC_SPI1_SCLK
SOC_SPI0_CS0
SOC_SPI0_MOSI
SOC_SPI0_MISO
SOC_SPI0_SCLK
I2C_SCL_MICOM_SOC
I2C_SDA_MICOM_SOC
I2C_SCL2_SOC
I2C_SDA2_SOC
+3.3V_LNA_TU
+3.3V_TUNER
+3.3V_NORMAL
+3.3V_NORMAL
I2C PULL UP
I2C_CH1_pullup_1.8K
I2C_CH1_pullup_1.8K
BR
JP
ISDB_PIP
Default
ISDB
VCC
8
WC
7
SCL
6
SDA
5
VCC
8
WP
7
SCL
6
SDA
5
BOOT MODE
"0 : EMMC
"1 : TEST MODE
BOOT_MODE
H13D_XTAL_560ohm
A26
XIN_MAIN
XIN
R152
560
B26
XO_MAIN
XOUT
H13D_XTAL_100ohm
R152-*1 100
B27
XTAL_BYPASS
AT37
H13DA_XTAL
AU16
PORES_N
AD34
OPM1
OPM1
AD33
OPM0
OPM0
AT26
H13A_SCL
H13DA_SCL
AU26
H13A_SDA
H13DA_SDA
AP9
TRST_N0
TRST_N0
AN9
TMS0
TMS0
AP11
TCK0
TCK0
AN11
TDI0
TDI0
AN10
TDO0
TDO0
AM10
TRST_N1
AM9
TMS1
AM11
TCK1
AM12
TDI1
AL11
TDO1
AL9
PLLSET1
PLLSET1
AL10
PLLSET0
PLLSET0
AE34
BOOT_MODE
BOOT_MODE
Y33
EXT_INTR3/GPIO70
W32
EXT_INTR2/GPIO69
LG1154D_H13D
W33
EXT_INTR1/GPIO68
W34
EXT_INTR0/GPIO67
AU12
SOC_RX
UART0_RXD
AT12
SOC_TX
UART0_TXD
AU13
M_REMOTE_RX
UART1_RXD
AT13
M_REMOTE_TX
UART1_TXD
AP12
UART1_RTS
AR12
M_REMOTE_CTS
UART1_CTS
AE35
SOC_SPI1_CS
SPI_CS0/GPIO36
AE36
SPI_DO0/GPIO38
AF36
SPI_DI0/GPIO39
AF35
SPI_SCLK0/GPIO37
AG34
SPI_CS1
AF33
SPI_DO1
AG33
SPI_DI1
AG32
SPI_SCLK1
AR15
I2C_SCL1
SCL0/GPIO66
AP15
I2C_SDA1
SDA0/GPIO65
AR16
SCL1/GPIO64
AP16
SDA1/GPIO79
AP17
SCL2/GPIO78
AR17
SDA2/GPIO77
AP6
I2C_SCL4
SCL3
AR6
I2C_SDA4
SDA3
AH32
I2C_SCL5
SCL4
AJ33
I2C_SDA5
SDA4
AH34
I2C_SCL6
SCL5
AH33
I2C_SDA6
SDA5
I2C_SDA_MICOM
I2C_SDA_MICOM_SOC
AR100
I2C_SCL_MICOM_SOC
I2C_SCL_MICOM
33
0
R102
I2C_SDA2
I2C_SDA2_SOC
0
R104
I2C_SCL2
I2C_SCL2_SOC
R147-*1
3.3K
I2C_CH1_pullup_3.3K
R148-*1
I2C_SDA1
3.3K
I2C_SCL1
I2C_CH1_pullup_3.3K
I2C_SDA_MICOM_SOC
I2C_SCL_MICOM_SOC
+3.3V_NORMAL
I2C_SDA2_SOC
I2C_SCL2_SOC
I2C_SDA4
I2C for tuner
I2C_SCL4
I2C_SDA5
I2C_SCL5
I2C_SDA6
I2C for tuner
I2C_SCL6
EB_ADDR[0-14]
EMMC_DATA[0-7]
EB_DATA[0-7]
IC100
AC-coupling CAP
Place near by LG1154D
+3.3V_NORMAL
HDMI_MUX_SEL
AL34
CAM_SLIDE_DET
GPIO31
AM33
GPIO30
AM32
Compensation_Done
GPIO29
AF30
GPIO28
AN34
GPIO27
/RST_PHY
AK34
GPIO26
RF_SWITCH_CTL
AL33
+3.3V_NORMAL
GPIO25
HDMI_HPD_3
AL32
GPIO24
HDMI_HPD_2
For ISP
AR9
GPIO23/UART2_TX
For connecting
AM5
SIC debug tool
GPIO22/UART2_RX
AM6
GPIO21
AUD_LRCH2
To surround amp
AM7
R107
100
GPIO20
AL6
GPIO19
INSTANT_BOOT
AK7
GPIO18
AK6
GPIO17
SC_DET
local dimming
AK5
AV1_CVBS_DET
GPIO16
I2C port
AJ5
GPIO15
AMP_RESET_N
AJ6
GPIO14
COMP1_DET
AJ7
GPIO13
M_RFModule_RESET
AH6
GPIO12
HP_DET
AG7
SIL9617_RESET
GPIO11
AG6
GPIO10
/TU_RESET1
AG5
U14_RESET
GPIO9
AF5
GPIO8
D14_HWRESET
AH30
FRC_FLASH_WP
GPIO7
AG30
/RST_HUB
GPIO6
AN33
GPIO5
AK33
GPIO4
/TU_RESET2
AE30
GPIO3
MN864778_RESET
AD30
GPIO2
AN32
GPIO1
AK32
AMP_RESET_N_1
GPIO0
AR101
+3.3V_NORMAL
3.3K
AC32
DDCD0_CK
AC33
DDCD0_DA
AB33
HPD0
AE37
SPDIF_OUT_ARC
PHY0_ARC_OUT_0
AC36
PHY0_RX0N_0
HDMI_RX0-
AC37
PHY0_RX0P_0
HDMI_RX0+
AB36
PHY0_RX1N_0
HDMI_RX1-
AB37
PHY0_RX1P_0
HDMI_RX1+
AA36
PHY0_RX2N_0
HDMI_RX2-
AA37
PHY0_RX2P_0
HDMI_RX2+
AD36
PHY0_RXCN_0
HDMI_CLK-
AD37
PHY0_RXCP_0
HDMI_CLK+
R32
HUB_PORT_OVER0
/USB_OCD1
R33
HUB_VBUS_CTRL0
USB_CTL1
Not Used Net (UB85/95/UC89)
CAM_TRIGGER_DET
H13_CONNECT
SOC_SPI1_CS
SOC_SPI1_MOSI
SOC_SPI1_MISO
SOC_SPI1_SCLK
CAM_SLIDE_DET
AUD_LRCH2
AMP_RESET_N_1
U14_RESET
/RST_HUB
AMP_RESET_N_1
M_REMOTE_RX
M_REMOTE_TX
M_REMOTE_RTS
M_REMOTE_CTS
Not Used Net (Only OLED)
DPC_CTL
Not Used Net (Only OLED 77EC98)
AMP_RESET_N
BSD-14Y-UD-001-HD
2013-12-17
H13 D CHIP
LGE Internal Use Only
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