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Hitachi 42LDF30UB Service Manual

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CAUTION:
Before servicing this chassis, it is important that the service technician read the "Safety
Precautions" and "Product Safety Notices" in this service manual.
ATTENTION:
Avant d'effectuer l'entretien du châssis, le technicien doit lire les «Précautions de sécurité»
et les «Notices de sécurité du produit» présentés dans le présent manuel.
VORSICHT:
Vor Öffnen des Gehäuses hat der Service-Ingenieur die „Sicherheitshinweise" und „Hinweise
zur Produktsicherheit" in diesem Wartungshandbuch zu lesen.
FOR ALL PARTS PLEASE MAKE
FOR YOUR LOCAL OUTLET GO TO
SPECIFICATIONS AND PARTS ARE SUBJECT TO CHANGE FOR IMPROVEMENT
SERVICE MANUAL
MANUEL D'ENTRETIEN
WARTUNGSHANDBUCH
CONTACT WITH ASWO.
www.aswo.com
Colour Television
July 2009
No. 0252
42LDF30U
42LDF30UA
42LDF30UB
Data
contained
within
this
manual is subject to alteration for
improvement.
Les données fournies dans le présent
manuel d'entretien peuvent faire l'objet
de modifications en vue de perfectionner
le produit.
Die
in
diesem
Wartungshandbuch
enthaltenen Spezifikationen können sich
zwecks Verbesserungen ändern.
Service

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  • Page 1 No. 0252 42LDF30U 42LDF30UA 42LDF30UB SERVICE MANUAL MANUEL D'ENTRETIEN WARTUNGSHANDBUCH CAUTION: Before servicing this chassis, it is important that the service technician read the “Safety Precautions” and “Product Safety Notices” in this service manual. Data contained within this Service manual is subject to alteration for improvement.

  • Page 2: Table Of Contents

    TABLE OF CONTENTS INTRODUCTION........................7 TUNER............................ 7 2.1. General description of TDTC-G101D: ............... 7 2.2. Features of TDTC-G101D: ..................7 2.3. Pinning: ........................8 AUDIO AMPLIFIER STAGE WITH MP7722..............8 3.1. General Description..................... 8 3.2. Features ........................8 3.3. Applications ........................ 9 3.4.
  • Page 3 11.2. Features ......................... 23 11.3. Electrical Specifications ..................24 11.4. Pinning ........................25 32K Smart Serial EEPROM – 24C32 ................25 12.1. General Description....................25 12.2. Features ......................... 25 11.3 Absolute Maximum Ratings and Electrical Characteristics........26 11.4 Pinning ........................27 512K CMOS Serial Flash –...
  • Page 4 15.7. AZC099-04S ......................42 15.7.1. General Description....................42 15.7.2. Features ......................... 42 15.7.3. Absolute Maximum Ratings.................. 43 15.7.4. Pinning ........................43 15.8. TDA1308....................... 43 15.8.1. General Description....................43 15.8.2. Features ......................... 43 15.8.3. Absolute Maximum Ratings.................. 44 15.8.4. Pinning ........................44 15.9.
  • Page 5 15.16.4. Pinning ......................54 15.17. MP2112 ......................... 55 15.17.1. General Description................... 55 15.17.2. Features ......................55 15.17.3. Absolute Maximum Ratings................55 15.17.4. Pinning ......................55 15.18. STLITE49M ......................56 15.18.1. General Description................... 56 15.18.2. Features ......................56 15.18.3. Absolute Maximum Ratings................56 15.18.4.

  • Page 7: Introduction

    1. INTRODUCTION 17MB35 Main Board consists of MSTAR concept. This IC is capable of handling Audio processing, video processing, Scaling-Display processing, 3D comb filter, OSD and text processing, 8 bit dual LVDS transmitter. TV supports PAL, SECAM, NTSC colour standards and multiple transmission standards as B/G, D/K, I/I’, and L/L’...

  • Page 8: Pinning

    From 45.25MHz to 863.25MHz for CCIR CH) Including IF AGC with SAW Filter Bandwidth Switching (7/8 MHz) possible DC/DC Converter built in for Tuning Voltage Internal(or External) RF AGC, Antenna Power Optional 2.3. Pinning: 3. AUDIO AMPLIFIER STAGE WITH MP7722 3.1.

  • Page 9: Applications

    Low Noise (190μV Typical) Switching Frequency Up to 1MHz 9.5V to 24V Operation from a Single Supply Integrated Startup and Shutdown Pop Elimination Circuit Thermal and Short Circuit Protection Integrated 180m Mute/Standby Modes (Sleep) Thermally Enhanced 20-Pin TSSOP Package with Exposed Pad 3.3.

  • Page 10: Operating Specifications

    3.4.2. Operating Specifications 3.5. Pinning...

  • Page 11: Power Stage

    4. POWER STAGE The DC voltages required at various parts of the chassis and inverters are provided by a main power supply unit. The power supply generates 33V, 24V, 12V, 5V, 3,3V and 5V, 3,3V stand by mode DC voltages. Power stage which is on-chasis generates 1,26V stand by voltage and 8V, 2,6V, 1,8V and 1V supplies for other different parts of the chassis.
  • Page 12 8 configurable CVBS & Y/C S-video inputs Supports Teletext level-1.5, WSS, VPS, Closed-caption, and V-chip Macrovision detection CVBS video output Video IF for Multi-Standard Analog TV Digital low IF architecture Stepped-gain PGA with 26 dB tuning range and 1 dB tuning resolution Maximum IF analog gain of 37dB in addition to digital gain Programmable TOP to accommodate different tuner gain to optimize noise and linearity performance...

  • Page 13: Sil9185 3:1 Hdmi 1.3 Switch

    6. SIL9185 3:1 HDMI 1.3 Switch 6.1. General Desription The SiI9185A is the first generation of TMDS switch device supporting Revision 1.3 of the HDMI Specification (HDMI Consortium; June 2006). With three HDMI inputs and a single output, the SiI9185A provides a low-cost method of adding additional HDMI ports to the latest Digital TVs.

  • Page 14: Pinning

    6.4. Pinning Configuration Pins...

  • Page 15: Qam Demodulator - Stv0297E

    7. QAM DEMODULATOR – STV0297E 7.1. General Desription The STV0297E is a complete single-chip QAM (quadrature amplitude modulation) demodulation and FEC (forward error correction) solution that performs sampled IF to transport stream (MPEG-2 or MPEG-4) block processing of QAM signals. It is intended for the digital transmission of compressed television, sound, and data services over cable.

  • Page 16: Features

    Japanese DBS systems require a transport stream multiplex frame (TSMF) layer to carry digital signals over cable systems. When the recovered transport stream is a multiplex frame, the STV0297E post-processes it to extract a single transport stream. Automatic detection of the TSMF layer is provided. The chip integrates an analog-to- digital converter that delivers the required performance to handle up to 256-QAM signals in a direct IF sampling architecture, thus eliminating the need for external downconversion.

  • Page 17: Pinning

    7.4. Pinning 8. HY5DV281622DT-5 DDR SDRAM 128M 8.1. General Description The Hynix HY5DV281622 is a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the point-to-point applications which requires high bandwidth. The Hynix 8Mx16 DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock.

  • Page 18: Features

    8.2. Features 3.3V for VDD and 2.5V for VDDQ power supply All inputs and outputs are compatible with SSTL_2 interface JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has 2 bytewide data strobes (LDQS, UDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers...

  • Page 19: Pinning

    8.4. Pinning 9. IS42S16100C1 SDRAM 9.1. General Description ISSI’s 16Mb Synchronous DRAM IS42S16100C1 is organized as a 524,288-word x 16- bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

  • Page 20: Pinning

    Dual internal bank controlled by A11 (bank select) Single 3.3V power supply LVTTL interface Programmable burst length (1, 2, 4, 8, full page) Programmable burst sequence:Sequential/Interleave 4096 refresh cycles every 64 ms Random column address every clock cycle Programmable CAS latency (2, 3 clocks) Burst read/write and burst read/single write operations capability Burst termination by burst stop and precharge command Byte controlled by LDQM and UDQM...

  • Page 21: Pin Configuration

    10.1.3. Pin configuration: 1 Input 2 Switching input 3 Chip carrier - ground 4 Output 5 Output 10.1.4. Frequency response:...

  • Page 22: If Filter For Video Applications - Epcos K3958M

    10.2. IF Filter for Video Applications – Epcos K3958M 10.2.1. Standart: L/L’ 10.2.2. Features: TV IF filter with Nyquist slopes at 33.90 MHz and 38.90 MHz Constant group delay Pin configuration: 1 Input 2 Input - ground 3 Chip - carrier ground 4 Output 5 Output 10.2.3.

  • Page 23: 48-Bits Serial Eeprom - 24Lc02

    11. 2048-Bits Serial EEPROM – 24LC02 11.1. General Description The 24LC01/02 is a 1K/2K-bit serial read/write non-volatile memory device using the CMOS floating gate process. Its 1024/2048 bits of memory are organized into 128/256 words and each word is 8 bits. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential.

  • Page 24: Electrical Specifications

    40-year data retention 106 erase/write cycles per word 8-pin DIP/SOP package 8-pin TSSOP (HT24LC02 only) Commerical temperature range (0°C to +70°C) 11.3. Electrical Specifications...

  • Page 25: Pinning

    11.4. Pinning 12. 32K Smart Serial EEPROM – 24C32 12.1. General Description The Microchip Technology Inc. 24C32 is a 4K x 8 (32K bit) Serial Electrically Erasable PROM. This device has been developed for advanced, low power applications such as personal communications or data acquisition.

  • Page 26: Absolute Maximum Ratings And Electrical Characteristics

    Self-timed write cycle (including auto-erase) Power on/off data protection circuitry Endurance: 10,000,000 Erase/Write cycles guaranteed for High Endurance Block, 1,000,000 E/W cycles guaranteed for Standard Endurance Block 8 byte page, or byte modes available 1 page x 8 line input cache (64 bytes) for fast write loads Schmitt trigger, filtered inputs for noise suppression Output slope control to eliminate ground bounce 2 ms typical write cycle time, byte or page...

  • Page 27: Pinning

    12.4 Pinning...

  • Page 28: Cmos Serial Flash - Mx25L512

    13. 512K CMOS Serial Flash – MX25L512 13.1. General Description The MX25L512 is a CMOS 524,288 bit serial Flash memory, which is configured as 65,536 x 8 internally. The MX25L512 feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO).

  • Page 29: Absolute Maximum Ratings

    SOFTWARE FEATURES Input Data Format 1-byte Command code Block Lock protection The BP0~BP1 status bit defines the size of the area to be software protected against Program and Erase instructions. Auto Erase and Auto Program Algorithm Automatically erases and verifies data at selected sector Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths (Any page to be programed should have page in the erased state first)

  • Page 30: Integrated Dvb-T Receiver

    14. Integrated DVB-T Receiver 14.1 General Description CT216T is a highly integrated single chip for DVB-T compliant STB solution. Compared with Cheertek's previous generations of STB receiver devices. CT216T further interates COFDM demodulator USB 2.0 HS host controller, memory card reader, 1/2-bit SPIFlash interface, audio DAC, PWM in/out and SAR-ADC functions.

  • Page 31: Features

    flickering, HW JPEG decoding, flesh tone and black-white extensions, and improvement of small video quality. CT216T includes COFDM demodulator transport stream de-multiplexer, DVB-CSA compliant de-scrambler, RISC MPUs, MPEG-1/2/4 AV decoder, digital T\/ encoder, audio DACs, USB 2.0 HS host controller, memory card reader, smart card reader, CI controller and other peripherals.
  • Page 32 DVB-CSA de-scramblers Video Decoding and Processing MPEG-2 MP@ML MPEG-4 SP&ASP PAL/NTSC format conversion 3:2 pull down Zoom in/out from 1/16X to 16X HW JPEG decode 4/8/16-bit OSD with anti-flickering On chip NTSC/PAL TV encoder CVBS, S-VHS, and component video VBI insertion for Teletext, CC and WSS ITU-R BT.601 and ITU-R BT.656 outputs Flesh tone extension Black/white extension,...

  • Page 33: Absolute Maximum Rating And Electrical Characteristics

    High Speed I/O USB 2.0 HS host controller Memory card reader with SD, MMC, and MS interfaces Compliant with SD spec. 1.1 and MMC spec. 4.0 with 1-bit & 4-bit modes. Compliant with Memory Stick Pro format spec. 1.02 and Memory stick format spec 1.43 with 1-bit and 4-bit modes.

  • Page 35: Ic Descriptions

    15. IC DESCRIPTIONS 15.1. LM1117 15.1.1. General Description The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductor’s industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors.

  • Page 36: Pinning

    15.1.5. Pinning 15.2. 74HCT4053 15.2.1. General Description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E).

  • Page 37: Absolute Maximum Ratings

    15.2.4. Absolute Maximum Ratings 15.2.5. Pinning 15.3. NUP4004M5 15.3.1. General Description This 5-Pin bi-directional transient suppressor array is designed for applications requiring transient overvoltage protection capability. It is intended for use in transient voltage and...

  • Page 38: Features

    ESD sensitive equipment such as computers, printers, cell phones, medical equipment, and other applications. Its integrated design provides bi-directional protection for four separate lines using a single TSOP-5 package. This device is ideal for situations where board space is a premium. 15.3.2.

  • Page 39: Fdn336P

    15.4. FDN336P 15.4.1. General Description The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 bits.This device can operate in two modes: Transmit Only mode and I2C bidirectional mode. When powered, the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal applied on VCLK.

  • Page 40: Tl062

    15.5. TL062 - 15.5.1. General Description Low-power JFET-input operational amplifier 15.5.2. Features Very Low Power Consumption Typical Supply Current . . . 200 μA (Per Amplifier) Wide Common-Mode and Differential Voltage Ranges Low Input Bias and Offset Currents Common-Mode Input Voltage Range Includes VCC+ Output Short-Circuit Protection High Input Impedance .

  • Page 41: Pinning

    15.5.4. Pinning 15.6. PI5V330 15.6.1. General Description Pericom Semiconductor.s PI5V series of mixed signal video circuits are produced in the Company.s advanced CMOS low-power technology, achieving industry leading performance. PI5V330 true bidirectional Quad 2-channel multiplexer/demultiplexer that is recommended for both RGB and composite video switching applications.

  • Page 42: Pinning

    15.6.4. Pinning 15.7. AZC099-04S 15.7.1. General Description AZC099-04S is a high performance and low cost design which includes surge rated diode arrays to protect high speed data interfaces. The AZC099-04S family has been specifically designed to protect sensitive components, which are connected to data and transmission lines, from over-voltage caused by Electrostatic Discharging (ESD), Electrical Fast Transients (EFT), and Lightning.

  • Page 43: Absolute Maximum Ratings

    15.7.3. Absolute Maximum Ratings 15.7.4. Pinning 15.8. TDA1308 15.8.1. General Description The TDA1308; TDA1308A is an integrated class-AB stereo headphone driver contained in an SO8, DIP8 or a TSSOP8 plastic package. The TDA1308AUK is available in an 8 bump wafer level chip-size package (WLCSP8). The device is fabricated in a 1 mm Complementary Metal Oxide Semiconductor (CMOS) process and has been primarily developed for portable digital audio applications.

  • Page 44: Absolute Maximum Ratings

    High slew rate Low distortion Large output voltage swing 15.8.3. Absolute Maximum Ratings 15.8.4. Pinning 15.9. ST3222 15.9.1. General Description The ST3222 is a 3V powered EIA/TIA-232 and V.28/V.24 communications interface with low power requirements and high data-rate capabilities. ST3222 has a proprietary low dropout transmitter output stage providing true RS-232 performance from 3 to 3.6V power supplies.

  • Page 45: Absolute Maximum Ratings

    15.9.3. Absolute Maximum Ratings 15.9.4. Pinning 15.10. LM358D 15.10.1. General Description The LM158 series consists of two independent, high gain, internally frequency compensated operational amplifiers which were designed specifically to operate from a...

  • Page 46: Features

    single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. Application areas include transducer amplifiers, dc gain blocks and all the conventional op amp circuits which now can be more easily implemented in single power supply systems.

  • Page 47: Pinning

    15.10.4. Pinning 15.11. 74LCX244 15.11.1. General Description The LCX244 contains eight non-inverting buffers with 3-STATE outputs. The device may be employed as a memory address driver, clock driver and bus-oriented transmitter/receiver. The LCX244 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment.

  • Page 48: Pinning

    15.11.4. Pinning 15.12. 74LCX245 15.12.1. General Description The LCX245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage (2.5V and 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The T/R input determines the direction of data flow through the device.

  • Page 49: Absolute Maximum Ratings

    15.12.3. Absolute Maximum Ratings 15.12.4. Pinning 15.13. FSA3157 15.13.1. General Description The NC7SB3157 / FSA3157 is a high-performance, single- pole / double-throw (SPDT) analog switch or 2:1 multiplexer/ de-multiplexer bus switch. The device is fabricated with advanced sub-micron CMOS technology to achieve high-speed enable and disable times and low on resistance.

  • Page 50: Features

    The control input tolerates voltages up to 5.5V, independent of the VCC operating range. 15.13.2. Features Useful in both analog and digital applications Space-saving, SC70 6-lead surface mount package Ultra-small, MicroPak™ Pb-free leadless package Broad VCC operating range: 1.65V to 5.5V Rail-to-rail signal handling Power-down, high-impedance control input Over-voltage tolerance of control input to 7.0V...

  • Page 51: Fms6145

    15.14. FMS6145 15.14.1. General Description The FMS6145 Low-Cost Video Filter (LCVF) is intended to replace passive LC and drivers with a low-cost integrated device. Five 4th-order provide improved image quality compared to typical 2nd or 3rd-order passive solutions. The FMS6145 may be directly driven by a DC-coupled DAC output or an AC-coupled signal.

  • Page 52: Mt48Lc4M16A2Tg8E

    15.15. MT48LC4M16A2TG8E 15.15.1. General Description The 64Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 67,108,864 bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x4’s 16,777,216-bit banks is organized as 4,096 rows by 1,024 columns by 4 bits.

  • Page 53: Pinning

    15.15.4. Pinning 15.16. MP1583 15.16.1. General Description The MP1583 is a step-down regulator with a built in internal Power MOSFET. It achieves 3A continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.

  • Page 54: Features

    15.16.2. Features 3A Output Current Programmable Soft-Start 100m Stable with Low ESR Output Ceramic Capacitors Up to 95% Efficiency 20μA Shutdown Mode Fixed 385KHz frequency Thermal Shutdown Cycle-by-Cycle Over Current Protection Wide 4.75 to 23V operating Input Range Output Adjustable From 1.22 to 21V Under Voltage Lockout Available in 8 pin SOIC Package 3A Evaluation Board Available...

  • Page 55: Mp2112

    15.17. MP2112 15.17.1. General Description The MP2112 is a 1MHz constant frequency, current mode, PWM step-down converter. The device integrates a main switch and a synchronous rectifier for high efficiency without an external Schottky diode. It is ideal for powering portable equipment that powered by a single cell Lithium-Ion (Li+) battery.

  • Page 56: Stlite49M

    15.18. STLITE49M 15.18.1. General Description The ST7LITE49M is a member of the ST7 microcontroller family. All ST7 devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set. The ST7LITE49M features FLASH memory with byte-by-byte In-Circuit Programming (ICP) and In-Application Programming (IAP) capability.

  • Page 57: Pinning

    15.18.4. Pinning...

  • Page 58: Max809Ltr

    15.19. MAX809LTR 15.19.1. General Description The MAX809 and MAX810 are cost-effective system supervisor circuits designed to monitor VCC in digital systems and provide a reset signal to the host processor when necessary. No external components are required. The reset output is driven active within 10 _sec of VCC falling through the reset voltage threshold.

  • Page 59: Pinning

    15.19.4. Pinning 16. SERVICE MENU SETTINGS In order to reach service menu, First Press “MENU” Then press the remote control code, which is “4725”. In DTV mode, first press “MENU” and select “TV SETUP”. Then, press “4725”. 16.1. Video Setup Panel Info <........>...
  • Page 60 New Zelland Australia DK<..> I<..> L<..> Equalizer <..> If “Yes” selected, “Equalizer” item is seen in “Sound” menu. Headphone <..> If “Yes” selected, “Headphone” item is seen in “Sound” menu. Power On/Off Melody <..> If “Yes” selected, when power on/off conditions, the power on/off melody can be heard.

  • Page 61: Service Scan/Tuning Setup

    An. USB Prescale <..> Value between 0 to 255 Dig. USB Prescale <..> Value between 0 to 255 Clipping Levels ( AVL On) FM Clipping <..> Value between 0 to 255 AM Clipping <..> Value between 0 to 255 NICAM Clipping <..> Value between 0 to 255 SCART Clipping <..>...

  • Page 62: Options

    16.4. Options Options-1 Power Up Standby Last state TV Open Mode Source 1st TV Last Tv First APS <..> If “Yes” selected, first time TV opens by asking APS. APS Volume <..> Value between 0 to +63 Burn In Mode <..> If “Yes”...
  • Page 63 Teletext Options TXT Darkness <..> Value between 0 to +63 TXT Type <..> Fasttext&Toptext Default Fastext Toptext TXT Language <..> Menu West East Cyrillic Turk/Gre Arabic Persian Auto No Txt Warning <..> If “Yes” selected, “No Txt Transmission” warning appears on the screen when pressing txt button from RC.

  • Page 64: External Source Settings

    PIP Options Pip <..> AV PIP No PIP PC PIP Hotel Options <..> Hotel TV <..> If “Yes” selected, “Hotel TV” feature is active. IR Smartloader <..> If “Yes” selected, “IR Smartloader” feature is active. 16.5. External Source Settings TV <..> DTV <..>...

  • Page 65: Diagnostic

    DSUB9 Download <..> If “On” selected, DTV software can be updated from DSUB9. 16.9. Diagnostic Eeprom I2C Tuner I2C IF I2C HDMI I2C DTV RS232 16.10. Product Info 17. SOFTWARE UPDATE DESCRIPTION 16.1 17MB35 Analog Part Software Update With Bootloader Procedure 1.1 The File Types Used By The Bootloader All file types that used by the bootloader software are listed below: 1.
  • Page 66 Parity: None Stop bits: 1 Flow control: None In this case the bootloader sofware puts “C” character to uart. After repeating “C” characters are seen in the hyperterminal user can send any file to chassis by selecting Transfer -> Send File menu item and choosing “1K Xmodem” from protocol section. Figure 1.
  • Page 67 Figure 2. The Programming Service Menu After then you must see Xmodem menu in the hyperterminal.To download hdcp key press k or to download eeprom content press w. Figure 3. Xmodem Menu If the repeated “C” characters are seen you can transfer file content via select Transfer- >Send File and choose “Xmodem”...

  • Page 68: 17Mb30 Hdcp Key Upload Procedure

    Figure 4. The Starting To Send 16.2 17MB30 HDCP key upload procedure. 1) Turn on TV set. 2) Open a COM connection using fallowing parameters and select ISP COM Port Baud Rate: 9600 bps Data Bits: 8 Stop Bits: 1 Parity: None Flow Control: None 3) Enter service menu by pressing “4”...

  • Page 69: 17Mb35 Digital Software Update From Scart

    16.3 17MB35 Digital Software Update From SCART Adjusting DTV Download Mode: 1. Power on the TV. 2. Exit the Stby Mode. 3. Enter the “Tv Menu”. 4. Enter “4725” for jumping to “Service Settings”. 5. Select “8. Programming” step. 6. Change “6. DTV Download” to “On”. 7.
  • Page 70 Software Updating Procedure 1. In the HyperTerminal Menu, click the “Connect” button. 2. Exit the Stby Mode. 3. The “Space” button on the keyboard must be pressed, when the following window can be seen. Selection Window 4. Press the “2” button on the keyboard for choosing “2. Upgrade Application with Xmodem”.
  • Page 71 6. Click the “Send” button on the HyperTerminal 7. Select the “Filename xxxx_slot1.img” using “Browse”. 8. Choose the “1K Xmodem” from “Protocol” option. Selection of File File and Protocol Selection Window Note: In the Software updating Procedure section, when the first “C” character is seen, the filename selection process must be finished before 10 seconds.
  • Page 72 Capture of Receving Data Failing 9. When sending the file the following window must be seen. Capture of Sending Process 10. After the sending process the following HyperTerminal window must be seen.
  • Page 73 Capture of End of The Sending Process 11. For sending second program file, the Software Updating Procedure must be repeated from the step X. Select the “Filename xxxx_slot2.img” using “Browse”. 12. After sending the second program file, the Software Updating Procedure will be succesful.

  • Page 74: 17Mb35 Digital Software Update From Usb

    Checking Of The New Software 1. Turn off and on the TV. 2. Enter the “Setup” submenu in the “DTV Menu”. 3. Choose the “Configuration” option. 4. For controlling new software, check the “Receiver Upgrade” option. 16.4 17MB35 Digital Software Update From USB Software upgrade is possible via USB disk by folowing the steps below.

  • Page 76: Power Management

    18.2. Power Management...

  • Page 77: Integrated Dvb-T Receiver Block Diagram

    18.3. Integrated DVB-T Receiver Block Diagram...
  • Page 79 No. 0252 Exploded View...
  • Page 80 TUNER SUPPLY OPSION ANALOG_IF ACTIVE ANTENNA DIF1 DIGITAL_IF- R482 U123 DIF2 DIGITAL_IF+ LM1117 F116 TP158 IF_AGC IF_AGC_DVB_IN 5V_TUN 5V_TUN 8V_VCC 330R 5V_TUN C600 C360 C134 TH101 VOUT ADDRESS_SEL_TUNER 100N 330R Near Tuner supply pin OVER_CUR_DETECT R502 330R 5V_TUN R460 F234 330R S105 SDA_TUNER...
  • Page 81 5V_VCC TP101 D112 C138 C5V6 100N C106 VGA_DDC_5V R120 VGA CONNECTOR SC1_CVBS_IN 220P D115 R584 SC1_CVBS_OUT 100R U112 C5V6 ST24LC21 PROG_EN 220P D111 R644 D117 R640 C5V6 C103 SC1_FB C5V6 R128 TX/SDA_SC R641 SC1_R 220P VGA_DDC_5V VGA_VSNC C104 R349 220P VGA_HSNC 100R C107...
  • Page 82 F218 AUDIO INPUT VOLTAGE DIVISION AND DC BLOCK C148 U138 8V_VCC VIDEO TERMINATIONS AND DIFFERENTIAL TRACING Place close to Paulo 600R C513 MST6WB7GQ-3 R679 Place 75R termination resistors C340 R607 close to Paulo reference GNDs 100N VGA_HSNC HSYNC1 AVDD_AU_1 LINE_IN_0L SC1_AUD_L_IN 100n 100N...
  • Page 83 CN121 HDMI Receiver In_B BAV70 F121 Pin23 Pin55 Pin43 Pin63 D147 3V3_STBY R385 3V3_HDMI 330R 5V_VCC HDMIB_2+ HDMIB_5V C379 C162 C163 C164 C165 Impedance 90R olacak F220 R386 100N 100N 100N 100N TP134 3V3_VCC HDMIB_2- 330R HDMIB_1+ C153 R387 R388 100N R746 HDMIB_1-...
  • Page 84 N.C. R277 U138 3V3_STBY 3V3_STBY MST6WB7GQ-3 R293 LED1 R276 GPIOL[0] SAR0 KEYBOARD_STBY_OUT LED&VFD 3V3_STBY LED2 GPIOL[1] SAR1 SC1_PIN8 R160 5V_STBY PDP_DISP_EN GPIOL[2] SAR2 SC2_PIN8 R742 C447 D130 R552 SIF_CTL 3V3_STBY GPIOL[3] SAR3 OVER_CUR_DETECT C5V6 F228 For Internal CPU Selection STBY_ON/OFF_NOT BACKLIGHT_DIM VFD_CSB R267...
  • Page 85 U138 MST6WB7GQ-3 SDRAM OPSION F126 DVB_SPDIF AD[0] DQM0 3V3_VCC 330R SPDIF_OUT AD[1] DQS0 DQS[0] F125 F150 2V6_VCC VDDM AD[2] AVDD_MI_3 VDDM 330R 3V3_STBY C469 C201 C202 C200 C199 C198 C197 C196 330R DDRAM OPSION 100N 100N 100N 100N 100N 100N 100N AD[3] MDATA[0]...
  • Page 86 S128 12V_VCC HEADPHONE AMPLIFIER POP NOISE CIRCUIT S127 5V_VCC S126 3V3_VCC C624 F190 100U 600R C453 HP_DETECT 1N4148 1N4148 C503 C541 8V_VCC D126 D125 JK107 C386 100U Q150 OUTA BC858B C540 C502 AMP_EN U128 F192 C472 INAN OUTB R423 600R TDA1308T HP_R R722...
  • Page 87 CAB/TER_AGC_SW C393 BUF1=MPEG Out to CI BUF4=CI to MPEG IN IF_AGC_QAM DIGITAL_IF- IF_AGC_QAM 3V3_BUF_DVB U135 3V3_BUF_DVB C384 C230 C233 * opt:with Cable * opt:with Cable C356 R322 5V_DVB 100N 100N FSA3157 470R DIGITAL_IF+ R332 R425 R470 3V3_BUF_DVB 3V3_BUF_DVB R321 IF_AGC_COFDM 3V3_BUF_DVB 3V3_BUF_DVB C280...
  • Page 88 CI CO NTROL SIGNALS SMART CARD INT ERFACE FUM Interface DVB VIDEO FILTER&AMP U134 SDRAM MT48LC4M16A2TG8E SM_PWR_EN R461 R180 ENC_CVBS R306 OUT1 DVB_CVBS 3V3_SDRAM_DVB VDD1 VSS3 C124 MPEG_TS_OUT_D0 CN109 DQ15 MD15 ENC_PR OUT2 R308 3V3_SDRAM_DVB VDDQ1 VSSQ4 MPEG_TS_OUT_SYNC 220p DQ14 MD14 ENC_PB F130...
  • Page 89 A/D DIMMING SELECTION C519 R339 W/IDTV Option 100N R340 U137 5V_VCC C599 C516 C358 R244 CN117 MP1583 R341 30V_VCC 3V3_VCC S211 100N U136 C518 C544 12V_VCC C357 R335 MP1583 24V_VCC 24V_VCC COMP C457 C568 C567 470U 100N S212 C517 5V_STBY 100U 100U R567...
  • Page 90 U138 MST6WB7GQ-3 CN105 S138 TX_PIX_B_0_N GND15 S164 TP167 2V6_VCC_PIX VDDC4 TX_PIX_B_0_P VDDC S165 TP168 2V6_VCC_PIX LVA4P RX_A_4_P TX_PIX_B_1_N S166 TP169 RX_A_4_N TX_PIX_B_1_P LVA4M TP170 RX_A_3_P TX_PIX_B_2_N LVA3P RX_B_CLK_N TP171 TP172 S142 LVA3M RX_A_3_N TX_PIX_B_2_P TX_PIX_B_4_N RX_B_CLK_P S145 LVACKP RX_A_CLK_P 2V6_VCC_PIX TX_PIX_B_4_P RX_B_3_N TP174...
  • Page 91 3V3_LPW ST7_Power On Reset CN128 3V3_LPW R776 C615 ICC_DATA_STBY 100n U146 ICC_CLK_STBY MAX809LTR GND RST ICC_RESET_STBY R771 100R ICC_RESET_STBY U150 MAX809LTR GND RST 1K olacak ICC_DATA_STBY 3V3_LPW R767 ICC_CLK_STBY PC3/ICCCLK I2C3 IR_IN PC4/LTIC S201 S200 R:0x24 IR_IN W:0x25 PROTECT F221 3V3_LPW U149 220R...
  • Page 92 CN117 Q142 CN10 6 Q143 C569 CN12 6 S204 R728 D119 CN119 R732 S21 3 C528 max:10mm R538 C580 C505 max:17mm C590 C460 C610 C516 D123 C466 C347 R744 C582 C623 Q149 C517 Q130 C345 C544 R335 R399 R549 CN10 5 C534 R572 S1 86...
  • Page 93 FOR ALL PARTS PLEASE MAKE CONTACT WITH ASWO FOR YOUR LOCAL OUTLET GO TO www.aswo.com...
  • Page 94 42LDF30U No. 0252 42LDF30UA 42LDF30UB...

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