BG0836 1/2.7 inch 1080P HD CMOS image sensor
P0
P1
P2
raw12 Output order of data
P0
P0
P0
P0
P0
P0
P0
[4]
[5]
[6]
[7]
[8]
[9]
[10]
raw10 Output order of data
P0
P0
P0
P0
P0
P0
P0
[2]
[3]
[4]
[5]
[6]
[7]
[8]
Others
IO adjust the drive ability
Name
DV_CTRL
Pixel Clock phase adjustment
Name
CLK_DLY_CTL
P3
P0
P1
P1
P1
P1
P1
P1
P1
P1
P0
P0
[11]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[0]
[1]
P0
P1
P1
P1
P1
P1
P1
P1
P1
P2
P2
[9]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[2]
[3]
Figure 15 raw10/raw12 Data output sequence
FS
Figure 16 Mipi Frame Timing
BG0836 supports adjustment of IO drive capability. It is used to make the Sensor to
adapt different load applications. The detailed information is shown in the table below:
Table 20 Adjust the driving ability registers
Address
0x008d
Table 21 Adjust Pclk phase position
Address
0x0088
P0
P0
P1
P1
P1
P1
P2
P2
P2
P2
P2
P2
[2]
[3]
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
P2
P2
P2
P2
P2
P2
P3
P3
P3
P3
P3
P3
[4]
[5]
[6]
[7]
[8]
[9]
[2]
[3]
[4]
[5]
[6]
[7]
Image Line Data
Blanking
Width
Bit[7:4]: dv_sync adjust the driving
capability
8
Bit[3:0]: dout adjust the driving
capability
Width
•
3
Bit[2:0] pclk Phase Adjustment
22/ 24
P2
P2
P3
P3
P3
P3
P3
P3
P3
P3
P2
P2
[10]
[11]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[0]
[1]
P3
P3
P0
P0
P1
P1
P2
P2
P3
P3
[8]
[9]
[0]
[1]
[0]
[1]
[0]
[1]
[0]
[1]
FE
Function
Function
V1.2
P2
P2
P3
P3
P3
P3
[2]
[3]
[0]
[1]
[2]
[3]