Texas Instruments 990 Manual page 82

Video display terminal
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~~--94_5_4_24_-9_7_0_1
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16
scan lines per row; for the i 920-character display, there are 10 scan lines per row. Therefore,
each character is read 16 or 10 times (once each scan line) for display on the screen. The ASCII
character from each location (even those not displayed during retrace) is presented to the
character generator each character time. Then, depending on the line being scanned, a pattern is
produced to develop the video for that particular character.
The first character of the row following the current row is
not
the next character in sequence in
the character address counter. The contents of the character address counter are copied into the
character address latch during charncter 0 (for the row, not the scan line). The vaiue in the
character address latch is modified during the scan of the last line of every row at character
time 90 (trailing edge of HSQ - horizontal sync). This places the value in the latch (05
16
in the
case of the first row) required to initialize the character counter at the end of the scan line. The
latch contents are then written into the counter as 050
16
as the first character (character 0) of
the second row.
Notice that during the scan of the first row, characters 000 through 04F
16
are displayed, and
characters 050
16
through 063
16
(normally displayed in second row) are accessed during horizon-
tal retrace. Characters 050
16
through 063
16
are not displayed (at this time) even though their
addresses are presented to memory, a character is read from memory, and an output (VDQ) is
produced by the video output shift register. The video output shift register's output is blanked
by the video output amplifier. (If the VDT controller were in the self-test mode, VDQ would
stiil be returned to the computer.) Likewise, if the cursor is at some location (052
16 ,
for
example) the comparator logic indicates a cursor compare operation while scanning row 0, but
the compare does not affect the blanked screen.
NOTE
The character address counter values change in such a way that
unique character values
cannot
be decoded along a scan line (e.g.,
the last (99th) character of row 0 is 063
16 ;
of row 1 is OB3
16 :
of
row 2 is 103
16 ,
etc.).
The least significant four bits (KAD,3-0) are valid since they are set to 0 at the beginning of
each scan line. The carry (KCOL) from this stage of the character address counter is used to
enable the character counter to develop KCH,0-2. The character counter is set to 0 at the end of
every scan line (K99 L).
Character Decoder ROM. KAD(3-0) and KCH(2-0) are decoded by the character decoder ROM as
shown in table 1-10 to produce the following signals:
Standard (Row)
Character
Signature
Description
0
KOOL
Character time 0
74
HDEQSL
End sync during vertical sync
79
HBSL
Start horizontal blanking
82
HDSL
Start horizontal drive
90
HDENDL
End horizontal drive
90
NHDENDL
Inverted end horizontal drive
99
K99L
Character time 99
99
NK99L
Inverted character time 99
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1-72
Digital Systems Division

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