Texas Instruments 990 Manual page 52

Video display terminal
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~----9_4_54_2_4_-9_1_0_1
______________________________________________
~
\OJ
1.,:)0~/0
RB
TO DIFFERENCE
AMPLIFIER
Rll
Rl4
C4
RIS
151
Rl6
NOTE.
IN EARLIER MODELS SI IS
A SWITCH ; LATER MODELS
HAVE A JUMPER PLUG
INSTALLED.
t
R56
FROM AUXILIARY
H-SYNC r.ENER.0..TOR
I
F'ROivi VC:RTiCAL
----~
SYNC GENERATOR
Figure 1-26. Model 911 VDT Power/Logic PWB Dual-Gain Video Amplifier
+SVDC
VIDEO
TO CRT
MONITOR
Transistor Q4 (clamping circuit) conducts during horizontal or vertical sync to pull the level of
the video signal to ground. This prevents display of extraneous video components during retrace,
and the passing of horizontal and vertical synchronization pulses by the dual-gain video amplifier.
1.4.2.8 Vertical Sync Generator. The vertical sync generator amplifies and passes only the
vertical component of the composite sync signal from the difference amplifier. Figure 1-27 is a
schematic diagram of the vertical sync generator. The circuitry at the base of QS acts as a
low-pass filter to pass only the 60-hertz (or SO-hertz) vertical synchronization component of the
composite sync signal. Trapsistor QS then amplifies and inverts the vertical synchronization
component of the composite sync signal. The output of transistor QS drives two cascaded
Schmitt-Trigger inverters which form a pulse shaping and delay circuit. The low-active output of
this circuit is nominally low for 220 microseconds.
1.4.2.9 H-Drive Generator. Figure 1-28 is a schematic diagram for the H-drive generator that
passes the horizontal synchronization component of the composite sync signal during normal
operation, and produces an "artificial" horizontal synchronization when the terminal is not
connected to an operating controller. Horizontal synchronization signal (CRTCLK) is also used
to clock the keyboard UART.
1-42
Digital Systems Division

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