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ASCB BOARD ASSEMBLY
CN401
1:TRKA
2:TRKB
3:RF
4:FCS RTN
5:TRK RTN
6:FCS ERR
7:FCS IN
8:GND
9:TRK ERR
10:TRK IN
11:FCS SUM
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Adjusting Specifications
Inspection Standard
VDTB Board Assembly
Sync-generator
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Clock Adjustment | C202
17,734475MHz + 100Hz | PAL mode
14.31818MHz + 100Hz
NTSC mode
2
NTSC REF Clock
vc201
adjustment
Adjust for 3.5546875MHz at pin 8 (R347 ) of C301.
3.5546875MHz + 25Hz
PAlsmode
Adjust VC401 for 17.734475MHz at the J403 side of
R506 lead wire in the video section.
Adjust VC201 for 14.31818MHz at the J403 side of
C507 lead wire in the video section.
Adjust VR471 so that the time lag
between CCD input video (Q408
VCO Center
Frequency
Adjustment
emitter) and the CCD output video
({Q414 emitter) becomes 75 psec
(1H + 11 psec ).
For this adjustment, connect pin 9
of IC404 to GND.
REF Clock
75 psec + 2 sec
PAL mode
2Vp-p +5%
PAL mode
Main-line video + 3%
Adjust the 100 % white video
level to 2 Vp-p at VIDEO OUT
(J401, pin 6).
Video Level
Adjustment
Adjust VR441 so that the level of the 1H-delay video at
pin 33 of IC401 becomes the same as that of the
main-line video pin 35.
While observing the magenta screen on a vector scope,
minimize the jitter at VIDEO OUT (J401, pin 6).
1H Delay Video
PAL mode
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