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CLD- D925
SGCSYNCO
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Outputs the composite sync from the internal sync generation section with negative logic at NTSC.
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Outputs CSYNC (pin 11) signal with delayed 4 clock at PAL and 2 clock at 3D.
No 140ns shift
}42}vDD
|
— '| Power supply pin
Connect to +5V
143 ]GNO
| = | Groundpin
|
Connect to GND
| a4 PACH
ia Game PACK H sync
Inputs H sync from the game PACK with positive logic.
input
Set to
open
when not
synchronizing with game side.
| 45 | VRESET
Ea Game PACK V reset
Inputs V reset signal from the game PACK with negative logic.
inp
Set to open
when not
synchronizing with game
side.
AReVNE
Game PACK composite | Inputs composite sync from the game PACK with negative logic.
GCSYNC
'
sync input
Set to open when not synchronizing with game
side.
a7 |RFMON
| 0 | Read filter monitor
Monitor output of fleld signal in the internal sync generation section.
output
H : First field, L : Second field
Outputs a clock which is input clock divided by 2 from CK14M (pin 12).
CK7MO
7MHz clock output
Ever time, reset by falling edge of H sync of the read system. (When H sync Is falling edged, this clock Is
falling edge, too) Use tor clock input
of OSD IC.
Im
When using the character superimpose function, connect the character frame output of OSD IC.
fala
| | Character frame input | Wren this pin is _""L" and GHA (pin 50) is_"H"_, the gray level is Imposed on the video data.
wre
When using the character superimpose function, connect the character output of OSD IC.
50 fcr
| Character input
When "L" the white level is Imposed on the video data.
El SGCSYNC
lo | S fe Sutpuolraad
Outputs H sync from the internal sync generation section with negative logic at NTSC.
52 | VSYNC
a
aa
output of read
Outputs V sync from the Internal sync generation section with negative logic.
Composite sync outout
Outputs composite sync from the internal sync generation section with negative logic at NTSC.
SGCSYNC
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P
Perform the read control the field memory by this reference signal. Output this signal delayed by 1 clock
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with the video data output. HSYNC and VSYNC signals are synchronized.
Outputs the pulse which is showed the color burst position on the video data output at NTSC. .
safer
[0 | Burst flag pulse output | "41 period is the burst position.
lo | Chroma invert output —_| It outputs the result of judgement of the chroma continuity from the video data input or the chroma data
CRINV
P/N=4
input.
Outputs
"L" at microcomputer command XVSQ = 0 and "H" at XVSQ = 1, this signal output by
hey VSQ output (P/N=0) _| tatching with V of the read side.
EI CSYNCIST
Le | i coated
Outputs for inserting the sync to the video signal after the D/A conversion.
VBLKMO:
V blanking period
Outputs V blanking period (half H period) from the internal sync generation section with negative logic at
57 | VoL
iy
monitor outp
NTSC.
| 58 | voouTo
| 59 | voouT1__|
| 60 | voouT2__|
Video
data output 3
PezTano
|
= |Groundpin
[ConecttoGND
Pes [von
|
— [Powersuppiypin — [Connecttossv
Peatesc
[co [Fscoupur
| Outputs a lock which is input clock divided by 4 trom CK14M (pin 12).
| 65 | VDOUT4
Video
data output 4
Pes [vous _|
| 68 | VOOUT7
|
Video data output 7
Outputs lower 4 bit of adding result between the video data input or luminance data and chroma data
input, it output after 3 clocks as compared with the normal Input.
Outputs upper 4 bit of adding result between the video data input or luminance data and chroma data
input.
Outputs L/H pulse which is the phase difference between the PACH signal and H sync signal at rising
edge of the internal free-run H sync generation section.
fermen Lo [fara
}70|pacon
| 0 | Game rack eS | Outputs "H" by detecting the PACH signal input.
ro
fo Phase difference output
71
between the PACH and
tree-run H
o90 =|
— J oscoutputpin
—_| Outputs 0/90 signal at PAL trick play
[WE
| © |Writeenable output | Controlthewrite operation of tieid memory
TWAST [0 [Wie reset output | Outputs signal for inilaizing the wrle address offeld memory
Cd
FvoINo_|_1_[
vdeo data input
PVDINt
||| Video data
inputs
|VOIN2
|| | Videodata input 2
Ti [ ideo data
inputs
[© | Read enable output__| Gontrolthe read operation offleld
memory,
[© [Read reset output | Outputs signal for initializing the read address of field memory
Inputs lower 4 bit data output of fleld memory
RRST
ain
al atnlA~[N~
sla}
allel
asfala]
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