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Description of Blocks
The following is a brief description of each of the registers on the block diagram. Certain con-
ventions are followed. These are:
First Item:
The size of the register.
Second Item:
The abbreviation for the name of the register (no abb. means no abbreviation
is used).
Third Item:
A or N, to indicate that the register is accessible (A) or is not directly
accessible (N) to the program.
A Register (18 bits, A, A)
B Register (18 bits, B, A)
The A and B registers are the principal working registers of the DATANE T-30. They are identical
and have identical functions and instructions except for the parity network, which is connected to
just the B register.
C Register (7 bits, C, A)
The C register is used to access a specific input/output channel of the buffer selector. This is
used both for selection of a particular buffer and for selection of a particular word in memory.
In addition, C can be used as a normal index register when indirect addressing is used.
L Register (15 bits, L, N)
The L register contains the address of the next memory location to be accessed by the data
communications processor.
N Register (7 bits, N, N)
The N register is used to facilitate the instruction decoding process.
P Counter (15 bits, P, A)
The P counter contains the address of the next instruction to be executed.
Q
Counter (14 bits,
Q,
A)
The Q counter serves as the elapsed time clock.
Y Register (18 bits, Y, N)
The Y register is used to form and hold the intermediate operand for an instruction.
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