Linear Technology DC861A-A Quick Start Manual page 3

DC861 QUICK START GUIDE
(Note 1)
(
Note 1)
Note 1: States 13, 14 and 15 (binary 11xx) are not used. Programming a channel to states 8 or higher w il l conf igure that particul ar channel
into a l ow pow er shutdow n state. In addition, programming a channel into state 15 (binary 1111) w il l cause that particul ar channel to draw
up to 20mA of suppl y current and is not recommended.
D escription of the 3-W ire SPI Interf ace
G ain control of each amplif ier is independently programmable
using the 3-wire SPI interf ace (see Figure 3). Logic levels f or
the LTC6912 3-wire serial interf ace are TTL/ CM O S compatible.
W hen CS/ LD is low, the serial data on DI N is shif ted into an 8-
bit shif t-register on the rising edge of the clock, with the M SB
transf erred f irst. Serial data on DO UT is shif ted out on the
clock' s f alling edge. A rising edge on CS/ LD will latch the shif t-
register' s contents into an 8-bit D-latch and disable the clock
internally on the I C. The upper nibble of the D-latch (4 most
signif icant bits), conf igures the gain f or the B-channel ampli-
f ier. The lower nibble of the D-latch (4 least signif icant bits),
conf igures the gain f or the A-channel amplif ier. Tables 1 and 2
detail the nominal gains and respective gain codes.
2
Figure 3.Bl ock Diagram, LTC6912-1/ 2 Serial Interf ace