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Supermicro PIIISEA User Manual

Supermicro PIIISEA User Manual

Supermicro piiisea motherboards: user guide
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UPER
SUPER PIIISED
SUPER PIIISEA
USER'S AND BIOS
MANUAL
Revision 1.1

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Summary of Contents for Supermicro PIIISEA

  • Page 1 ® UPER SUPER PIIISED SUPER PIIISEA USER’S AND BIOS MANUAL Revision 1.1...
  • Page 2 SUPERMICRO COMPUTER reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software, if any, and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or reduced to any medium or machine without prior written consent.

  • Page 3: Preface

    Single Edge Contact Cartridge (S.E.C.C.) . Celeron processors that are packaged in the SEPP (Single Edge Processor Package) cartridge are also supported by the PIIISED/PIIISEA. These car- tridge packages and their associated "Slot 1" infrastructure will provide the headroom for future high-performance processors.
  • Page 4 User’s Manual SUPER PIIISED/PIIISEA Appendix A provides information on BIOS error beep codes and messages. Appendix B lists post diagnostic error messages.

  • Page 5: Table Of Contents

    Overview ... 1-1 Checklist ... 1-1 Contacting Supermicro ... 1-2 SUPER PIIISED Motherboard Image ... 1-4 SUPER PIIISEA Motherboard Image ... 1-5 SUPER PIIISED Motherboard Layout ... 1-6 SUPER PIIISEA Motherboard Layout ... 1-8 810E Chipset: System Block Diagram ... 1-10 Motherboard Features ...
  • Page 6 SUPER PIIISED/PIIISEA Universal Serial Bus ... 2-8 Serial Ports ... 2-8 Wake-On-LAN ... 2-8 Fan Headers ... 2-8 CD Headers ... 2-9 Overheat LED ... 2-9 Chassis Intrusion ... 2-9 Jumper Settings ... 2-10 Changing the CPU/FSB Speed ... 2-10 CMOS Clear ...
  • Page 7 Peripheral Setup ... 4-18 Auto-Detect Hard Disks ... 4-21 Change User/Supervisor Password ... 4-21 Change Language Setting ... 4-22 Auto Configuration with Optimal Settings ... 4-22 Auto Configuration with Fail Safe Settings ... 4-22 Save Settings and Exit ... 4-22 Exit Without Saving ...
  • Page 8 User’s Manual SUPER PIIISED/PIIISEA Notes...

  • Page 9: Chapter 1: Introduction

    One (1) Supermicro Mainboard One (1) ATA66 ribbon cable for IDE devices One (1) Floppy ribbon cable for floppy drives One (1) Supermicro CD containing drivers and utilities One (1) URM (Univeral Retention Mechanism for the CPU - preinstalled) One (1) User's/BIOS Manual...

  • Page 10: Contacting Supermicro

    Manual UPER PIIISED/PIIISEA CONTACTING SUPERMICRO Headquarters Address: Super Micro Computer, Inc. 2051 Junction Avenue San Jose, CA 95131 U.S.A. Tel: +1 (408) 895-2001 Fax: +1 (408) 895-2008 E-mail: marketing@supermicro.com (General Information) support@supermicro.com (Technical Support) Web site: www.supermicro.com European Office Address: Super Micro Computer B.V.
  • Page 11 Chapter 1: Introduction Notes...

  • Page 12: Super Piiised Motherboard Image

    Manual UPER PIIISED/PIIISEA SUPER PIIISED Figure 1-1. SUPER PIIISED Motherboard Image...

  • Page 13: Super Piiisea Motherboard Image

    Chapter 1: Introduction SUPER PIIISEA Figure 1-2. SUPER PIIISEA Motherboard Image...

  • Page 14: Super Piiised Motherboard Layout

    Manual UPER PIIISED/PIIISEA J 3 0 K B / MOUSE J32, J33 U S B J 3 5 P a r a l l e l Port LINE LINE 11.6" AC'97 Audio CODEC Chip Figure 1-3. 7.0" GMCH PCI 6...

  • Page 15: Quick Reference

    Quick Reference Jumpers Description JBT1 CMOS Clear (p. 2-11) Chassis Intrusion (p. 2-9) JP11, JP12 Front Side Bus Speed (p. 2-10) Both: Pins 1-2 (Auto) JP28 AC'97 Enable/Disable (p. 2-11) Pin 1-2 (Enabled) JPWAKE Keyboard Wake-Up (p. 2-11) Connectors Description Audio Modem Riser (p.

  • Page 16: Super Piiisea Motherboard Layout

    P a r a l l e l Port LINE LINE 12" AC'97 Audio CODEC Chip Figure 1-4. 7.0" GMCH PCI 4 PCI 3 PCI 2 PCI 1 ISA 3 ISA 2 ISA 1 SUPER PIIISEA Motherboard Layout BATTERY JP26 I C H...
  • Page 17 Quick Reference Jumpers Description JBT1 CMOS Clear (p. 2-11) Chassis Intrusion (p. 2-9) JP11, JP12 Front Side Bus Speed (p. 2-10) Both: Pins 1-2 (Auto) JP28 AC'97 Enable/Disable (p. 2-11) Pin 1-2 (Enabled) JPWAKE Keyboard Wake-Up (p. 2-11) Connectors Description Audio Modem Riser (p.

  • Page 18: 810E Chipset: System Block Diagram

    Manual UPER PIIISED/PIIISEA Pentium III/II Celeron SEPP 133/100/66 MHz Host Bus 100 MHz SDRAM Bus S D R A M 133/100 MHz Bus G M C H 4MB Display Cache 421 BGA PCI Slots 33 MHz PCI Bus ATA66 IDE...
  • Page 19 Features of the PIIISED/PIIISEA Motherboard • Pentium III 450-600 MHz and Pentium II 350-450 MHz processors at 100 MHz bus speed and Pentium II 233-333 MHz and Celeron SEPP 266-466 MHz processors at 66 MHz bus speed. Note: 133 MHz will be supported by future Intel 133 MHz FSB processors.
  • Page 20 • SUPER Doctor utility • Drivers for 810 chipset utilities and onboard audio and video Dimensions • SUPER PIIISED - ATX: 11.6" x 7" (295 x 178 mm) • SUPER PIIISEA - ATX: 12" x 7" (305 x 178 mm) 1-12...

  • Page 21: Chipset Overview

    PCI Bus and communicates with the GMCH over a dedicated hub interface. There are two versions of the ICH: the ICH and the ICH0. The PIIISED/PIIISEA has the ICH version, which supports Ultra DMA/66. Audio Modem Riser (AMR)

  • Page 22: Pc Health Monitoring

    The default setting is Always OFF. PC Health Monitoring This section describes the PC health monitoring features of the SUPER PIIISED/PIIISEA. The motherboard has an onboard System Hardware Monitor chip that supports PC health monitoring. Because system...
  • Page 23 Seven Onboard Voltage Monitors for the CPU Core, Chipset Voltage, +3.3V, 5V and 12V The onboard voltage monitor will scan these seven voltages continuously. Once a voltage becomes unstable, it will give a warning or send an error message to the screen. Users can adjust the voltage thresholds to define the sensitivity of the voltage monitor.

  • Page 24: 1-4 Acpi/Pc 98 Features

    The system BIOS is protected by hardware so that no virus can infect the BIOS area. The user can only change the BIOS content through the flash utility provided by SUPERMICRO. infecting the BIOS area and destroying valuable data. Auto-Switching Voltage Regulator for the CPU Core The auto-switching voltage regulator for the CPU core can support up to 20A current and auto-sense voltage IDs ranging from 1.3V to 3.5V.
  • Page 25 after "setup" and "p".) Then hit <Enter>. You can check to see if ACPI has been properly installed by looking for it in the Device Manager, which is located in the Control Panel in Windows. Microsoft OnNow The OnNow design initiative is a comprehensive, system-wide approach to system and device power control.

  • Page 26: Power Supply

    It is even more important for processors that have high CPU clock rates of 300 MHz and above. The SUPER PIIISED/PIIISEA accommodates ATX power supplies. Although most power supplies generally meet the specifications required by the CPU, some are inadequate.

  • Page 27: Super I/O

    Chapter 1: Introduction Super I/O The disk drive adapter functions of the Super I/O chip include a floppy disk drive controller that is compatible with industry standard 82077/765, a data separator, write pre-compensation circuitry, decode logic, data rate selec- tion, a clock generator, drive interface control logic and interrupt and DMA logic.
  • Page 28 Manual UPER PIIISED/PIIISEA Notes 1-20...

  • Page 29: Chapter 2: Installation

    Static-Sensitive Devices Static-sensitive electrical discharge can damage electronic components. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from static discharge. Precautions • Use a grounded wrist strap designed to prevent static discharge. •...

  • Page 30: Processor Installation

    Manual SUPER PIIISED/PIIISEA Processor Installation When handling the processor package, avoid placing direct pressure on the label area of the fan. The following pages cover the installation procedure. You should install the processor to the motherboard first, then install the motherboard in the chassis, then the memory and add-on cards, and finally the cables and drivers.

  • Page 31: Mounting The Motherboard In The Chassis

    Figure 2-1. Universal Retention Mechanism (URM) Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chassis. Chassis may include a variety of mounting fasteners made of metal or plastic. Although a chassis may have both types, metal fasteners are the most highly recommended because they ground the motherboard to the chassis.

  • Page 32: Installing Dimms

    Manual SUPER PIIISED/PIIISEA Installing DIMMs Exercise extreme care when installing or removing DIMM modules to prevent any possible damage. DIMM Installation (See Figure 2-2) 1. Insert DIMMs in Bank 0 through Bank 1 as required for the desired system memory.

  • Page 33: Port/Control Panel Connector Locations

    Port/Control Panel Connector Locations The I/O ports are color coded in conformance with the PC 99 specification. See Figure 2-3 below for the colors and locations of the various I/O ports. Mouse (Green) Ports (Black) Keyboard COM1 Port (Purple) (Turquoise) Figure 2-3.

  • Page 34: Connecting Cables

    Manual SUPER PIIISED/PIIISEA Connecting Cables Power Supply Connector After you have securely mounted the motherboard, memory and add-on cards, you are ready to connect the cables. Attach an ATX power supply cable to J29 by aligning the tabs on both connectors. See Table 2-1 for the pin definitions of an ATX power supply.

  • Page 35: Reset Connector

    Reset Connector The reset connector is located on pins 12 and 13 of JF2. This connec- tor attaches to the hardware reset switch on the computer case. See Table 2-4 for pin definitions. Hard Drive LED The hard drive LED is located on pins 1 to 4 of JF1.

  • Page 36: Universal Serial Bus

    Manual SUPER PIIISED/PIIISEA Universal Serial Bus (USB) The two Universal Serial Bus con- nectors are located on J32 and J33. See Table 2-9 for pin definitions. Serial Ports A connector for serial port COM1 is located on J34. A header for serial port COM2 is located just behind COM1.

  • Page 37: Cd Headers

    CD Headers There are two CD headers of dif- ferent sizes on the motherboard for audio CD playback. You must connect an audio cable from your CD player to the header that fits your cable's connector. Refer to Table 2-13 for pin definitions. Overheat LED (JOH) The JOH header is used to con- nect an LED to provide warning of...

  • Page 38: Jumper Settings

    Manual SUPER PIIISED/PIIISEA Jumper Settings Explanation of Jumpers To modify the operation of the moth- erboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed cir- cuit board.

  • Page 39: Cmos Clear

    CMOS Clear Refer to Table 2-17 for instruc- tions on how to clear CMOS. Al- ways remove the AC power cord from the system before clearing CMOS. For an ATX power sup- ply, you must completely shut down the system, remove the AC power cord, then use JBT1 to clear CMOS.

  • Page 40: Parallel Port, Amr, Floppy And Hard Disk Drive Connections

    Manual SUPER PIIISED/PIIISEA Parallel Port, AMR, Floppy and Hard Disk Drive Connections Use the following information to connect the floppy and hard disk drive cables. • The floppy disk drive cable has seven twisted wires. • A red mark on a wire typically designates the location of pin 1.

  • Page 41: Parallel Port Connector

    Table 2-20 Parallel (Printer) Port Pin Definitions (J35) Pin Number Function Pin Number Strobe- Data Bit 0 Data Bit 1 Data Bit 2 Data Bit 3 Data Bit 4 Data Bit 5 Data Bit 6 Data Bit 7 A C K B U S Y S L C T Floppy Connector...

  • Page 42: Amr Connector

    Manual SUPER PIIISED/PIIISEA N u m b e r M O N O _ O U T _ / P C _ B E E P B 1 0 B 1 1 B 1 2 B 1 3 B 1 4...

  • Page 43: Installing Software Drivers

    Installing Software Drivers After all the hardware has been installed you must install the software drivers. The necessary drivers are all included on the Supermicro CD that came packaged with your motherboard. After inserting this CD into your CDROM drive, the display shown in Figure 2-5 should appear.
  • Page 44 Manual SUPER PIIISED/PIIISEA Notes 2-16...

  • Page 45: Chapter 3: Troubleshooting

    Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Note: Always disconnect the power cord before adding, changing or installing any hardware components.

  • Page 46: Memory Errors

    They should know of any possible problem(s) with the specific system configuration that was sold to you. 1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked Question' (FAQ) sections in this chapter or see the FAQs on our web site (http://www.supermicro.com/techsupport.htm) before contacting Technical Support. NOTE...

  • Page 47: Frequently Asked Questions

    4. Distributors: For immediate assistance, please have your account number ready when placing a call to our technical support department. We can be reached by e-mail at support@supermicro.com or by fax at (408) 895- 2012. Frequently Asked Questions Question:...
  • Page 48 Manual SUPER PIIISED/PIIISEA the flash utility and give you an opportunity to save your current BIOS image. Flash the boot block and enter the name of the update BIOS image file. Note: It is important to save your current BIOS and rename it "super.rom"...
  • Page 49 Chapter 3: Troubleshooting Question: I see some of my PCI devices sharing IRQs, but the sys- tem seems to be fine. Is this correct or not? Answer: Some PCI Bus Mastering devices can share IRQs without perfor- mance penalties. These devices are designed to work correctly while shar- ing IRQs.

  • Page 50: Returning Merchandise For Service

    Manual SUPER PIIISED/PIIISEA PIIISED PCI 1 shares an IRQ with PCI 3 and the onboard graphics PCI 2 shares an IRQ with PCI 4, AMR/onboard audio and the SM bus* PCI 5 does not share an IRQ (dedicated IRQ) PCI 6 shares an IRQ with the USB...

  • Page 51: Chapter 4: Bios

    Introduction This chapter describes the AMIBIOS for Intel 810 Pentium III, Pentium II 233- 450 MHz and Celeron SEPP 266-466 MHz processors. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily upgraded using a floppy disk- based program.

  • Page 52: Bios Features

    BIOS User's Manual BIOS Features • Supports Plug and Play V1.0A and DMI 2.1 • Supports Intel PCI (Peripheral Component Interconnect) (PME) local bus specification • Supports Advanced Power Management (APM) specification v 1.1 • Supports ACPI • Supports Flash ROM AMIBIOS supports the LS120 drive made by Matsushita-Kotobuki Electronics Industries Ltd.
  • Page 53 AMIBIOS HIFLEX SETUP UTILITY VERSION 1.18 © 1998 American Megatrends, Inc. All Rights Reserved. PCI / PLUG AND PLAY SETUP CHANGE SUPERVISOR PASSWORD CHANGE LANGUAGE SETTING AUTO CONFIGURATION WITH OPTIMAL SETTINGS AUTO CONFIGURATION WITH FAIL-SAFE SETTINGS Standard CMOS setup for changing time, date, hard disk type, etc.

  • Page 54: Standard Cmos Setup

    BIOS User's Manual Standard CMOS Setup Date and Time Configuration Select the Standard option. Select the Date/Time icon. The current values for each category are displayed. Enter new values through the keyboard. Floppy A Floppy B Choose the Floppy Drive A or B icon to specify the floppy drive type. The settings are Not Installed, 360 KB 5¼...

  • Page 55: Advanced Cmos Setup

    Entering Drive Parameters You can also enter the hard disk drive parameters. The drive parameters are: Parameter Description Type The number for a drive with certain identification parameters. Cylinders The number of cylinders in the disk drive. H e a d s The number of heads.
  • Page 56 BIOS User's Manual AMIBIOS checks for a <Del> key press and runs AMIBIOS Setup if the key has been pressed. Enabled AMIBIOS does not test system memory above 1 MB. AMIBIOS does not wait up to 40 seconds for a READY signal from the IDE hard disk drive.
  • Page 57 Chapter 4: BIOS Secondary Slave fourth. The BIOS will attempt to read the boot record from 1st, 2nd, 3rd and 4th boot device in the selected order until it is successful in reading the booting record. The BIOS will not attempt to boot from any device which is not selected as the boot device.
  • Page 58 BIOS User's Manual PS/2 Mouse Support Settings for this option are Enabled or Disabled . When this option is set to Enabled , AMIBIOS supports a PS/2-type mouse. Password Check This option enables the password check option every time the system boots or the end user runs WinBIOS Setup.

  • Page 59: Advanced Chipset Setup

    Chapter 4: BIOS C000 Shadow (64K) D000 Shadow (64K) These options specify how the 32 KB of video ROM at C0000h is treated. The settings are: Disabled , Enabled or Cached . When set to Disabled, the contents of the video ROM are not copied to RAM. When set to Enabled, the contents of the video ROM area from C0000h-C7FFFh are copied (shadowed) from ROM to RAM for faster execution.
  • Page 60 BIOS User's Manual DRAM Cycle Time (SCLKS) The settings for this option are Fast or Slow . CAS# Latency (SCLKS) This option regulates the column address strobe. The settings for this option are 2 SCLKs or 3 SCLKs . RAS to CAS Delay (SCLKS) This option specifies the length of the delay inserted between the RAS (Row Address Strobe) and CAS (Column Address Strobe) signals of the DRAM system memory access cycle.
  • Page 61 CAS Latency This option regulates the speed of the Column Address Strobe (CAS). The settings are Slow or Fast . RAS Timing This option specifies the timing of the Row Address Strobe (RAS). The settings are Slow or Fast. RAS Precharge Timing The precharge time is the number of cycles it takes for the RAS to accumulate its charge before a DRAM refresh.

  • Page 62: Power Management

    BIOS User's Manual Memory Detection Mode The settings for this option are SPD or Auto . SDRAM Buffer Strength The settings for this option are Weak or Auto . CPU Clock Frequency This option allows you to overclock the FSB speed. You will only see those settings available for the CPU Speed that has been set in BIOS (page 4-10).
  • Page 63 Chapter 4: BIOS CPU Sleep Pin Enable The settings for this option are Enabled or Disabled . Green PC Monitor Power State This option specifies the power state that the green PC-compliant video monitor enters when AMIBIOS places it in a power savings state after the specified period of display inactivity has expired.
  • Page 64 BIOS User's Manual Advanced SMI Enable Controls Timer Overflow Enable This allows the system to generate a System Management Interrupt after a specific amount of time has passed. The settings are Enabled and Disabled . Thermal SMI Enable This allows the system to generate a System Management Interrupt after a specific temperature has been exeeded.
  • Page 65 Chapter 4: BIOS RTC Alarm Second This allows you to set a time at which the system will wake-up. The setting is a number representing the alarm second. AC97 Logic Resume This allows you to wake up the system from an AC'97 modem. The settings for this option are Enabled and Disabled .

  • Page 66: Pci/Plug And Play Setup

    BIOS User's Manual PCI/Plug and Play Setup Plug and Play-Aware OS The settings for this option are No or Yes . Set this option to Yes if the operating system in the computer is aware of and follows the Plug and Play specification.
  • Page 67 Chapter 4: BIOS The settings are Auto (AMIBIOS automatically determines where the offboard PCI IDE controller adapter card is installed), Slot 1 , Slot 2 , Slot 3 , Slot 4, Slot 5 or Slot 6 . This option forces IRQ14 and IRQ15 to a PCI slot on the PCI local bus. This is necessary to support non-compliant ISA IDE controller adapter cards.

  • Page 68: Peripheral Setup

    BIOS User's Manual These options specify which bus the specified IRQ line is used on and allow you to reserve IRQs for legacy ISA adapter cards. If more IRQs must be removed from the pool, the end user can use these options to reserve the IRQ by assigning an ISA/EISA setting to it.
  • Page 69 Chassis Fan Thermal Control Fan The above features are for PC Health Monitoring. The motherboards with W83781D have seven onboard voltage monitors for the CPU core, CPU I/O, +3.3V, +5V, -5V, +12V, and -12V, and for the three-fan status monitor.
  • Page 70 BIOS User's Manual Onboard Parallel Port This option specifies the base I/O port address of the parallel port on the motherboard. The settings are Auto (AMIBIOS automatically determines the correct base I/O port address), Disabled , 378 , 278 and 3BC . Parallel Port Mode This option specifies the parallel port mode.

  • Page 71: Auto-Detect Hard Disks

    MIDI Port Base Address This option specifies the base address to be used for the MIDI port. The settings are 298h, 330h and 300h . MIDI IRQ This option specifies the IRQ to be used for the parallel port. The settings are 5, 7, 9 and 10 .

  • Page 72: Change Language Setting

    BIOS User's Manual Change Language Setting Because this version of BIOS only supports English at this time, this setting cannot be chosen. Future releases may support other languages. Auto Configuration with Optimal Settings The Optimal default settings provide optimum performance settings for all devices and system features.

  • Page 73: Appendix A: Bios Error Beep Codes And Messages

    Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes & Messages During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
  • Page 74 BIOS Manual Beep Codes If you hear... 5 short beeps + 1 long beep The following codes will be implemented in future BIOS releases. If you hear... 6 short beeps + 1 long beep 7 short beeps + 1 long beep 8 short beeps + 1 long beep 9 short beeps + 1 long beep 10 short beeps + 1 long beep...
  • Page 75 Error Message 8042 Gate -- A20 Error Address Line Short! C: Drive Error C: Drive Failure Cache Memory Bad CH-2 Timer Error CMOS Battery State Low CMOS Checksum Failure CMOS System Option Not Set CMOS Display Type Mismatch CMOS Memory Size Mismatch Appendix A: BIOS Error Beep Codes Information...
  • Page 76 BIOS Manual Error Message CMOS Time and Date Not Set D: Drive Error D: Drive Failure Diskette Boot Failure Display Switch Not Proper DMA Error DMA #1 Error DMA #2 Error FDD Controller Failure HDD Controller Failure INTR #1 Error INTR #2 Error Information Run Standard Setup to set the date and time...
  • Page 77 Error Message Invalid Boot Diskette Keyboard Is Locked... Unlock It Keyboard Error KB/Interface Error No ROM BASIC Off Board Parity Error On Board Parity Error Parity Error???? Appendix A: BIOS Error Beep Codes Information The BIOS can read the disk in floppy drive A:, but cannot boot the computer.
  • Page 78 BIOS Manual Notes...
  • Page 79 Appendix B: AMIBIOS POST Diagnostic Error Messages AMIBIOS POST Diagnostic Error This section describes the power-on self-tests (POST) port 80 codes for the AMIBIOS. Check Point Description Code copying to specific areas is done. to INT 19h boot loader next. NMI is Disabled.
  • Page 80 BIOS Manual Check Point Description The keyboard controller command byte is written. Next, issuing the pin 23 and 24 blocking and unblocking commands. Next, checking if the <End or <Ins> keys were pressed during Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the <End>...

  • Page 81: Appendix B: Amibios Post Diagnostic Error Messages

    Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description Initialization before setting the video mode is complete. Configuring the monochrome mode and color mode settings next. Bus initialization system, static, output devices will be done next, if present. Passing control to the video ROM to perform any required configuration before the video ROM test.
  • Page 82 BIOS Manual Check Point Description Initializing the bus input, IPL, and general devices next, if present. Displaying bus initialization error messages. The new cursor position has been read and saved. Displaying the Hit <DEL> message next. Preparing the descriptor tables next. The descriptor tables are prepared.
  • Page 83 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset.
  • Page 84 BIOS Manual Check Point Description The DMA page register test passed. DMA Controller 1 base register test next. The DMA controller 1 base register test passed. Performing the DMA controller 2 base register test next. The DMA controller 2 base register test passed. Programming DMA controllers 1 and 2 next.
  • Page 85 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description programming been completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next. Returned from WINBIOS Setup and cleared the screen. Performing any necessary programming after WINBIOS Setup next.
  • Page 86 BIOS Manual Check Point Description Any initialization required after the option ROM test has been completed. printer base address next. Set the timer and printer base addresses. RS-232 base address next. Returned Performing Coprocessor test next. Required initialization before the Coprocessor test is over.
  • Page 87 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description Returned Next, performing the E000 option ROM had control. Initialization completed. Displaying the system configuration next. Building the multiprocessor table, if necessary. POST next. The system configuration is displayed. Uncompressing the DMI data and initializing DMI. Copying any code to specific areas.
  • Page 88 BIOS Manual If either <Ctrl><Home>was pressed or the system BIOS checksum is bad, next the system will go to checkpoint code E0h. Otherwise, going to checkpoint code D7h. B-10...

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