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Supermicro SUPER P6DGH User Manual

Supermicro p6dgh motherboards: user guide
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SUPER P6DGH
USER'S AND BIOS
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  • Page 1 ® UPER SUPER P6DGH USER’S AND BIOS MANUAL Revision 1.0...
  • Page 2 SUPERMICRO COMPUTER reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software, if any, and the documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or reduced to any medium or machine without prior written consent.

  • Page 3: Manual Organization

    PC end users. It provides information for the installation and use of the SUPER P6DGH motherboard. SUPER P6DGH supports Pentium II 233-450 MHz Slot 1 proces- sors. The Pentium II processor with Dual Independent Bus Architecture is housed in a new packaging technology called the Single Edge Con- tact Cartridge (S.E.C.C.).
  • Page 4 SUPER P6DGH User’s Manual If you encounter any problems, please see Chapter 3, Trouble- shooting, which describes troubleshooting procedures for the video, the memory and the setup configuration stored in memory. Instruc- tions are also included for contacting a technical assistance sup- port representative, returning merchandise for service and visiting our website for BIOS upgrades.

  • Page 5: Table Of Contents

    Quick Reference Guide ... ix Chapter 1: Introduction 1-1 Overview ... 1-1 SUPER P6DGH Image ... 1-4 SUPER P6DGH Motherboard Layout ... 1-5 SUPER P6DGH Features ... 1-6 1-2 PC Health Monitoring ... 1-8 1-3 ACPI/PC 98 Features ... 1-11 1-4 Chipset Overview ...
  • Page 6 SUPER P6DGH User’s Manual Unpacking ... 2-8 2-3 Changing the CPU Speed ... 2-8 2-4 Mounting the Motherboard in the Chassis ... 2-10 2-5 Connecting Cables and Jumpers ... 2-10 Power Supply Connectors ... 2-11 PW_ON Connector ... 2-13 Infrared Connector ... 2-13 Reset Header ...
  • Page 7 SBLINK Connector ... 2-26 2-6 Installing/Removing SIMM/DIMM Modules ... 2-27 SIMM/DIMM Module Installation ... 2-29 Removing DIMM Modules ... 2-29 Removing SIMM Modules ... 2-29 2-7 Connecting Parallel, FDD and HDD ... 2-30 Parallel Port Connector ... 2-31 Floppy Connector ... 2-32 IDE Interfaces ...
  • Page 8 SUPER P6DGH User's Manual Chapter 5: Running Setup 5-1 Setup ... 5-1 Standard Setup ... 5-1 Advanced Setup ... 5-3 Chipset Setup ... 5-7 Power Management ... 5-13 PCI/PnP Setup ... 5-15 Peripheral Setup ... 5-18 5-2 Security Setup ... 5-21 5-3 Utility Setup ...

  • Page 9: Quick Reference Guide

    Quick Reference Guide Jumper BZ_ON JA5, JA6, JA7 JB1, JB2, JB3, JB4 JBT1 JP11 JP20 JP911 JP915 JP917 JP918 JP919 JP920 JP921 JP924 Connector J15, J16 J17, J18 J36 (PWR_SEC) J940 J943 Quick Reference Guide Function Buzzer Enable/Disable SCSI Terminations CPU Speed Selection CMOS Clear External Bus Speed...
  • Page 10 SUPER P6DGH User's Manual Connector JOH1 JP20, JP21 JP25 JT1, JT2 Function IR Connector ATX PW_ON Reset Header Chassis Intrusion Overheat LED COM 1, COM 2 PS/2 Mouse Header CPU1, CPU2 Fans Thermal/Overheat Fan Main AT Power Connector Main ATX Power Connector...

  • Page 11: Chapter 1: Introduction

    RD I/O pro- cessor. The motherboard is Full AT size (13.2" x 12.2"). The SUPER P6DGH provides 9 PCI slots, 2 ISA slots and an Accelerated Graphics Port. It can accommodate a total of 2 GB registered DIMM or EDO sup- ported (66Mhz), or 1 GB SDRAM memory with 4 168-pin DIMM sock- ets.
  • Page 12 80 MB/s. This supports the Adaptec ARO-1130CA2 RAIDport III card for increased I/O per- formance and fault tolerance. The boards come with a CD that includes such software utilities as the SUPERMICRO PIIX4 Upgrade...
  • Page 13 Chapter 1: Introduction Utility for Windows 95, a BIOS Flash Upgrade Utility, a DMI Browser for Windows 95/98, a DMI Wizard, the SUPERMICRO SU- PER Doctor Utility ver 1.31a and Intel's LANDesk Client Manager for Windows NT and Windows 95/98...

  • Page 14: Super P6Dgh Image

    SUPER P6DGH User’s Manual SUPER P6DGH Figure 1-1. SUPER P6DGH Motherboard Image...
  • Page 15 Figure 1-2. P6DGH Motherboard Layout SBLINK * J9 is PCI slave only PIIX4E 7896 SCSI BIOS JBT1 JP20 PW_ON RESET SLED LOCK SPEAKER ® PWR_SEC ——–—— Primary Jumper Settings ———— BZ_ON: ON (default) JA5: JA6: JA7: JBT1: 1-2 (default) 2-3 CMOS Clear...

  • Page 16: Super P6Dgh Features

    SUPER P6DGH User’s Manual SUPER P6DGH Features The following list covers the general features of the SUPER P6DGH. • Dual Pentium II 233-450 MHz processors O-Ready • 66 MHz i960 RD I/O processor • Up to 64 MB Local IOP memory •...
  • Page 17 Manager (LDCM) support ACPI/PC 98 Features • Microsoft OnNow • Slow blinking LED for sleep-state indicator (ATX power only) • BIOS support for USB keyboard • Real-time clock wake-up alarm (ATX power only) • Main switch override mechanism (ATX power only) •...

  • Page 18: Pc Health Monitoring

    SUPER P6DGH User’s Manual 1-2 PC Health Monitoring This section describes the PC health monitoring features of the SUPER P6DGH. ware Monitor chip that supports PC health monitoring. Seven Onboard Voltage Monitors for the CPU Cores, +3.3V, 5V, and 12V The onboard voltage monitors scan seven voltages every second.
  • Page 19 CPU fan(s) at such times. System Overheat Alarm and LED This feature is available when used with SUPERMICRO's SUPER Doctor Utility. The program will generate a beep sound via the speaker when it detects a system overheat condition.
  • Page 20 The system BIOS is protected by hardware so that no virus can infect the BIOS area. The user can only change the BIOS content through the flash utility provided by SUPERMICRO. This feature can prevent viruses from infecting the BIOS area and destroying valu- able data.

  • Page 21: Acpi/Pc 98 Features

    1-3 ACPI/PC 98 Features ACPI stands for Advanced Configuration and Power Interface. The ACPI specification defines a flexible and abstract hardware inter- face that provides a standard way to integrate power management features throughout a PC system, which includes its hardware, the operating system and application software.

  • Page 22: Chipset Overview

    SUPER P6DGH User’s Manual BIOS Support for USB Keyboard If the USB keyboard is the only keyboard in the system. It will work like a normal keyboard during system boot-up. Real-Time Clock Wake-up Alarm (ATX power only) Although the PC is perceived to be off when not in use, it is still capable of responding to wake-up events according to a scheduled date and time.

  • Page 23: Wake-On-Lan

    ler and data path, the chipset supports the Accelerated Graphics Port (AGP) interface. AGP is a high performance, component level interconnect targeted at 3D applications and is based on a set of performance enhancements to PCI. The I/O subsystem portion of the 440GX platform is based on the PIIX4, a highly integrated ver- sion of Intel's PCI-to-ISA bridge family.

  • Page 24: Winbond Super I/O Controller

    SUPER P6DGH User’s Manual The SUPER P6DGH accommodates both AT and ATX power sup- plies. Although most power supplies generally meet the specifica- tions required by the CPU, some are inadequate. To obtain the highest system reliability, be certain that your AT power supply pro- vides +5 VDC with a voltage range between +4.95 VDC (minimum)
  • Page 25 1-8 AIC-7896 MultiChannel Single-Chip UltraSCSI Controller The SUPER P6DGH has an onboard Adaptec SCSI controller, which is 100% compatible with all major operating and hardware plat- forms. PCI 2.1 and SCAM Level 1 compliance are assured. Two independent Ultra II LVD SCSI channels provide a per channel data transfer rate of 80 MB/s.

  • Page 26: Warranty, Technical Support And Service

    SUPER P6DGH User’s Manual When Fast SCSI devices are connected, the total length of all cables (internal and external) must not exceed 3 meters (9.8 ft) to ensure reliable operation. If no Fast SCSI devices are connected, the total length of all cables must not exceed 6 meters (19.7 ft).

  • Page 27: Returns

    Chapter 1: Introduction supplied by us, (iii) any experimental or developmental products and (iv) products not manufactured by us; all of which components, software and products are provided "AS-IS." This warranty is in lieu of any other warranty expressed or implied. In no event will Super Micro be held liable for incidental or conse- quential damages, such as loss of revenue or loss of business arising from the purchase of Super Micro products.

  • Page 28: Chapter 2: Installation

    Chapter 2: Installation Chapter 2 Installation 2-1 Pentium II Processor Installation 1. Check the Intel-boxed processor kit for the following items: the processor with the fan/heat sink attached, two black plastic pegs, two black plastic supports and one power cable. 2.
  • Page 29 SUPER P6DGH User’s Manual 3. Slide a black plastic support onto each end of the fan/heat sink making sure that the hole and clip are on the outside edge of the support. If the supports are reversed, the holes will not line up with the pegs on the motherboard.
  • Page 30 Chapter 2: Installation 4. Slid the clip (A) onto each support toward the processor, expos- ing the hole that will fit over the peg on the motherboard. Push the latches (B) on the processor toward the center of the processor until they click into place.
  • Page 31 SUPER P6DGH User’s Manual 6. Slide the clips forward onto the supports (A) until they click into place to hold the pegs securely. Apply slight pressure to the peg and push the peg toward the clip while pushing the clip forward.
  • Page 32 Installation of the Universal Retention Mechanism (URM)* Please Note! Screws and washers attach from the bottom of the board and must be installed before mounting the board to the chassis. (See Figures 2-5 and 2-6) 1. When Installing the URM be sure the Left (L) and the Right (R) sides are placed accordingly.
  • Page 33 SUPER P6DGH User’s Manual Figure 2-6. Installing a Slot 1 Processor...

  • Page 34: Removing The Pentium Ii Processor

    Removing the Pentium II Processor To remove the Pentium II processor from the motherboard, follow these steps (the reverse of the installation process). 1. Disconnect the fan power cable from the motherboard. It is rec- ommended to leave the cable connected to the processor. 2.

  • Page 35: Static-Sensitive Devices

    SUPER P6DGH User’s Manual 2-2 Static-Sensitive Devices Static electrical discharges can damage electronic components. To prevent damage to your system board, it is important to handle it very carefully. protect your equipment from static discharge. Precautions • Use a grounded wrist strap designed for static discharge.
  • Page 36 it by 66 will give you a CPU Core/Bus Ratio of 4. After determining the proper CPU Core/Bus Ratio, refer to Table 2-1 for the jumper settings of JB1, JB2, JB3 and JB4. CPU Core/Bus Ratio = CPU Speed CPU Core/Bus Ratio = 266 MHz = 4.0 Table 2-1.

  • Page 37: Mounting The Motherboard In The Chassis

    Power Supply Connectors After you have securely mounted the motherboard to the chassis, you are ready to connect the cables. The SUPER P6DGH supports both AT and ATX power, only one of which can be used at a time.* Please check the power mode jumper settings on page 2-23.
  • Page 38 Table 2-3. Main AT Power Connector Pin Definitions Connector Number Number Table 2-4. Secondary AT Power Connector Pin Definitions Connector Number Number (+5V Extra) Chapter 2: Installation Function Power Good (Power on reset, TTL signal) +5 VCC +12 VCC -12 VCC Ground (Black wire to be connected) Ground (Black wire to be connected) Ground (Black wire to be connected)
  • Page 39 SUPER P6DGH User’s Manual Table 2-5. Main ATX Power Connector Pin Definitions Connector Number Number (ATX Power) Table 2-6. Secondary ATX Power Connector Pin Definitions Connector Number (PWR_SEC) Function 3.3V 3.3V PW-OK 5VSB Number 2-12 Number Function 3.3V -12V PS-ON Function +3.3V...

  • Page 40: Pw_On Connector

    PW_ON Connector The PW_ON connector is located on pins 9 and 10 of JF2. Momen- tarily contacting both pins will power on/off the system. To turn off the power, hold down the power button for at least 4 seconds. In order to have the "4-second"...

  • Page 41: Reset Header

    SUPER P6DGH User’s Manual Reset Header The reset header is located on pins 12 and 13 of JF2. This header attaches to the hardware Reset switch on the computer case. See Table 2-9 for pin definitions. Table 2-9. Reset Pin Definitions Keylock/Power LED Connector The keylock/power LED connector is located on pins 5 to 9 of JF1.

  • Page 42: Hard Drive Led

    Hard Drive LED The hard drive LED is located on pins 1 to 4 of JF1. Attach the hard drive LED cable onto pins 1 and 2. See Table 2-11 for pin defini- tions. Table 2-11. Hard Drive LED Pin Definitions Speaker Connector The speaker connector is located on pins 10 to 13 of JF1.

  • Page 43: At Keyboard Connector

    SUPER P6DGH User’s Manual AT Keyboard Connector Keyboard connector J74 has five pins. definitions. Table 2-13. Keyboard Connector Pin Definitions Universal Serial Bus The Universal Serial Bus is located on J17 and J18. See Table 2- 14 for pin definitions.

  • Page 44: Ps/2 Mouse Header

    PS/2 Mouse Header The PS/2 Mouse header is located on JP25. See Table 2-15 for pin definitions. Table 2-15. PS/2 Mouse Pin Definitions Number Serial Ports Serial port COM1 is located on J20 and serial port COM2 is located on J21. See Table 2-16 for pin definitions. Table 2-16.

  • Page 45: Power On/Off State

    SUPER P6DGH User’s Manual Power On/Off State (ATX power only) Refer to Table 2-17 on how to set JP20. Save Power Down (PD) State is the default and is used when you want the system to re- main in the power-off state when you first apply power to the system or when the system comes back from an AC power failure.

  • Page 46: Overheat Led

    Overheat LED Refer to Table 2-19 to connect an LED to JOH1 to indicate an over- heat warning. Table 2-19. Overheat LED Pin Definitions Buzzer Overheat Notification Refer to Table 2-20 for setting BZ_ON to either enable or disable buzzer BZ1 as an overheat warning. Table 2-20.

  • Page 47: Wake-On-Lan

    SUPER P6DGH User’s Manual Wake-On-LAN The Wake-On-LAN connector is located on WOL. Refer to Table 2- 22 for pin definitions. Note: The 5V standby for the ATX power mode requires a minimum of 720 mA or must comply with ATX Specification 2.01 for the WOL function to work.

  • Page 48: I960 Serial Port

    i960 Serial Port The i960 serial port is located on J943. Refer to Table 2-24 for pin definitions. Table 2-24. i960 Serial Port Pin Definitions Number i960 Fail LED Indicator ID4 is used to determine whether Mode 3 of the i960 RD IO proces- sor is functioning properly.

  • Page 49: I960 Initialization Modes

    SUPER P6DGH User’s Manual i960 Initialization Modes Refer to Table 2-26 for instructions on setting the mode. Mode 0 = i960 is configured as a PCI-PCI bridge. Mode 3 = i960 is configured as an I/O processor and a PCI-PCI bridge.

  • Page 50: I C Connector

    C Connector The I C connector located on J940 is for development purposes only. Refer to Table 2-28 for pin definitions. Table 2-28. I SLED (SCSI LED) Indicator The SLED connector is used to provide an LED indication of SCSI activity.

  • Page 51: I O Debug Led (Optional)

    SUPER P6DGH User’s Manual 0 Debug LED (Optional) An optional 7-segment LED display is located at IU48 for I purposes. AT/ATX Power Mode Jumper Settings* The JATPWR and JP100 jumpers are used to configure the system for either the AT or ATX power mode. Refer to Table 2-30 for the power mode settings.

  • Page 52: Scsi Termination Jumper Settings

    SCSI Termination Jumper Settings Jumpers JA5, JA6 and JA7 are used to terminate the SCSI chan- nels. Refer to Table 2-31 for the results of installing jumpers at these locations. Table 2-31. SCSI Termination Jumper Settings Jumper Setting Result Enables JA1 termination JA1 termination disabled Enables termination of low bytes on JA2 No termination of low bytes on JA2...

  • Page 53: Sblink Connector

    SUPER P6DGH User’s Manual SBLINK Connector The SBLINK connector is included for audio cards residing in a PCI slot when used with a serial IRQ. See the website of Creative Labs at www.soundblaster.com for more information on using this con- nector.

  • Page 54: Installing/Removing Simm/Dimm Modules

    Chapter 2: Installation 2-6 Installing/Removing SIMM/DIMM Modules The SUPER P6DGH can accommodate a maximum of 2 GB Regis- tered DIMM supported or 1 GB SDRAM DIMMs. It has 4 168-pin 3.3V unbuffered DIMM slots. It is not recommended to mix EDO DIMM modules with SDRAM DIMM modules.
  • Page 55 SUPER P6DGH User’s Manual Side View of DIMM Installation into Socket PC100 Notches To Install: Insert vertically, press down until it snaps into place. Pay attention to the two notches. Figure 2-7. Installing/Removing a DIMM Memory Module DIMM Note: Notches...

  • Page 56: Simm/Dimm Module Installation

    SIMM/DIMM Module Installation Insert DIMM modules in Bank 0 through Bank 3 as required for the desired system memory. Insert each DIMM module vertically into its socket. Pay attention to the two notches to prevent inserting the DIMM in the wrong position. Gently press the DIMM module until it snaps upright into place in the socket.
  • Page 57 SUPER P6DGH User’s Manual 2-7 Connecting Parallel, Floppy and Hard Disk Drives Use the following information to connect the floppy and hard disk drive cables. • The floppy disk drive cable has seven twisted wires. • A red mark on a wire typically designates the location of pin 1.

  • Page 58: Parallel Port Connector

    Parallel Port Connector The parallel port is located on J19. See Table 2-33 for pin defini- tions. Table 2-33. Parallel Port Pin Definitions Number Function Number Function Strobe- Data Bit 0 Data Bit 1 Data Bit 2 Data Bit 3 Data Bit 4 Data Bit 5 Data Bit 6...

  • Page 59: Floppy Connector

    SUPER P6DGH User’s Manual Floppy Connector The floppy connector is located on J22. definitions. Table 2-34. Floppy Connector Pin Definitions Number Function Number 2-32 See Table 2-34 for pin Function FDHDIN Reserved FDEDIN Index- Motor Enable Drive Select B- Drive Select A-...

  • Page 60: Ide Interfaces

    IDE Interfaces There are no jumpers to configure the onboard IDE interfaces J15 and J16. Refer to Table 2-35 for pin definitions. Table 2-35. IDE Connector Pin Definitions Number Function Number Reset IDE Host Data 7 Host Data 6 Host Data 5 Host Data 4 Host Data 3 Host Data 2...

  • Page 61: Agp Port Interface

    SUPER P6DGH User’s Manual AGP Port Interface There are no jumpers to configure the AGP port. Refer to Table 2- 36 for pin definitions. Table 2-36. AGP Pin Definitions Pin # S p a r e 5 . 0 V 5 .

  • Page 62: Ultra Ii Lvd Scsi Interfaces

    Ultra II LVD SCSI Interfaces Refer to Table 2-31 to configure the Ultra II LVD SCSI interfaces JA1 and JA2. Refer to Table 2-37 for pin definitions. Table 2-37. Ultra II LVD SCSI Pin Definitions C o n n e c t o r Contact N u m b e r S i g n a l N a m e s...

  • Page 63: Wide Scsi Interface

    SUPER P6DGH User’s Manual Wide SCSI Interface Refer to Table 2-38 for the Wide SCSI pin definitions. Table 2-38. 50-pin Wide SCSI Pin Definitions Pin Number Function Pin Number G N D G N D G N D G N D...

  • Page 64: Chapter 3: Troubleshooting

    Troubleshooting 3-1 Troubleshooting Procedures Use the following procedures and flowchart to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Before Power On Make sure there are no short circuits between the motherboard and the chassis.

  • Page 65: No Power

    Manual SUPER P6DGH User's No Power Make sure the default jumper is on and the CPU is correctly setup. Turn the power switch on and off to test the system. If the power is still not on, turn off the system power and move jumper JP20 from 2-3 to 1-2.

  • Page 66: Losing The System's Setup Configuration

    Frequently Asked Question (FAQ) sections in this chapter of the manual. Also, before contacting Technical Support , check our website FAQ at http://www.supermicro.com. Take note that the motherboard manufacturer Super Micro does not sell directly to end-users, so it is best to check with your distributor or reseller for troubleshooting services.

  • Page 67: Frequently Asked Questions

    Question: How do I update my BIOS? Answer: Update BIOS files are located on our web site at http:// www.supermicro.com. Please check the current BIOS revision and make sure it is newer than your BIOS before downloading. Select your motherboard model and download the BIOS file to your com- puter.
  • Page 68 Question: I have memory problems. What is the correct memory to use and which BIOS setting should I choose? Answer: The correct memory to use on the SUPER P6DGH is 168- pin DIMM 3.3V non-buffered SPD (Serial Present Detection) SDRAM and SDRAM.
  • Page 69 Manual SUPER P6DGH User's Answer: The supplied compact disc has quite a few drivers and programs that will greatly enhance your system. We recommend that you review the CD and install the applications you need. Appli- cations included on the CD are PCI IDE Bus Master drivers for Win- dows 95 and Windows NT, 440GX chipset drivers for Windows 95, and Super Doctor Monitoring software.

  • Page 70: Returning Merchandise For Service

    Chapter 3: Troubleshooting Question: In the P6DGH, there are 5 PCI slots and onboard SCSI devices on the primary PCI bus. How are the PCI interrupt re- sources shared? Answer: The PCI interrupts are assigned as follows: PIRQ A#: PCI 1 (J9), onboard SCSI (both channels on 7896)

  • Page 71: Chapter 4: Amibios

    4-1 Introduction This chapter describes the AMIBIOS for the Intel 440GX Pentium II Xeon 450/400 MHz processors. The AMIBIOS is stored in the Flash EEPROM and can be easily upgraded using a DOS program. System BIOS BIOS is the Basic Input Output System used in all IBM ®...

  • Page 72: Bios Features

    BIOS User's Manual American AMIBIOS (c) 1997 American Megatrends, Inc. M e g a Trends 0404981500 Pentium II Motherboard Made in USA R1.0 U P E R BIOS date code Checking NVRAM xxxxx KB OK Hit <DEL> if you want to run SETUP (C) Super Micro Computer, Inc., XX-XXXX-XXXXXX-XXXXXXXX-XXXXXX-XXXX-X 4-2 BIOS Features:...

  • Page 73: Bios Configuration Summary Screen

    • two negative voltage inputs • three fan-speed monitor inputs BIOS Configuration Summary Screen AMIBIOS displays a screen that looks similar to the following when the POST routines complete successfully. AMIBIOS System Configuration (C) 1985-1997 American Megatrends Inc., Main Processor : Pentium(tm) II Math Processor Floppy Drive A:...
  • Page 74 BIOS User's Manual Figure 4-1. Setup Option Highlighted Figure 4-2. Settings for Standard Option...

  • Page 75: Chapter 5: Running Setup

    The WinBIOS Setup options described in this section are selected by choosing the appropriate high-level icon from the Standard Setup screen. All icons displayed are described in this section, although the on-screen display is often all you need to understand how to set the options. Optimal and Fail-Safe default settings are in bold text unless otherwise noted.
  • Page 76 BIOS User's Manual is best to select Auto to allow AMIBIOS to determine the PIO mode. If you select a PIO mode that is not supported by the IDE drive, the drive will not work properly. If you are absolutely certain that you know the drive's PIO mode, select PIO mode 0-4, as appropriate.

  • Page 77: Advanced Setup

    Date and Time Configuration Select the Standard option. Select the Date/Time icon. The current values for each category are displayed. keyboard. Floppy A Floppy B Choose the Floppy Drive A or B icon to specify the floppy drive type. The settings are Not Installed, 360 KB 5¼ inch , 1.2 MB 5¼ inch , 720 KB 3½...
  • Page 78 BIOS User's Manual Pri Master ARMD Emulated as Pri Slave ARMD Emulated as Sec Master ARMD Emulated as Sec Slave ARMD Emulated as The options for Pri Master ARMD Emulated as, Pri Slave ARMD Emulated as, Sec Master ARMD Emulated as and Sec Slave ARMD Emulated as are Auto, Floppy or Hard disk .
  • Page 79 Chapter 5: Running Setup not yet been tried for booting). If selected as No and all selected boot devices failed to boot, the BIOS will not try to boot from the other boot devices which may be present but not selected as boot devices in setup. Initial Display Mode This option determines the screen that the POST will display first.
  • Page 80 BIOS User's Manual Primary Display This option specifies the type of display adapter card installed in the system. The settings are Absent, VGA/EGA , CGA40x25 , CGA80x25 or Mono . Password Check This option enables the password check option every time the system boots or the end user runs WinBIOS Setup.

  • Page 81: Chipset Setup

    Chapter 5: Running Setup copied (shadowed) from ROM to RAM for faster execution. When set to Cached , the contents of the video ROM area from C0000h-C7FFFh are copied from ROM to RAM, and can be written to or read from cache memory.
  • Page 82 BIOS User's Manual - The GX asserts SERR# for one clock when it detects a target abort during a GX-initiated PCI cycle . - The GX can also assert SERR# when a PCI parity error occurs during the address or data phase. - The GX can assert SERR# when it detects a PCI address or data parity error on the AGP.
  • Page 83 PCI1 to PCI0 Access The settings for this option are Enabled or Disabled . Set to Enabled to enable access between two different PCI buses (PCI1 and PCI0). Memory Autosizing Support The BIOS can dynamically detect and size SDRAM and EDO in a system populated with memory that has no SPD information.
  • Page 84 BIOS User's Manual Disabled . Management/APM to Enabled and set the power management timeout options as desired. DRAM Refresh Rate This option specifies the interval between refresh signals to DRAM system memory. The settings for this option are 15.6 us (microseconds), 31.2 us , 62.4 us , 124.8 us or 249.6 us .
  • Page 85 Chapter 5: Running Setup Gated Clock Signal GCLKEN enables internal dynamic clock gating in the GX when an AGPset "IDLE" state occurs. This happens when the GX detects an idle state on all its buses. The settings for this option are Enabled or Disabled .
  • Page 86 BIOS User's Manual 8-bit I/O Recovery Time This option specifies the length of the delay inserted between consecu- tive 8-bit I/O operations. The settings are Disabled , 1 SYSCLK , 2 SYSCLKs , 3 SYSCLKs , 4 SYSCLKs , 5 SYSCLKs , 6 SYSCLKs , 7 SYSCLKs or 8 SYSCLKs .

  • Page 87: Power Management

    Chapter 5: Running Setup DMA6 Type DMA7 Type These options specify the bus that the specified DMA channel can be used on. The settings are PC/PCI , Distributed or Normal ISA . Memory Buffer Strength The settings for this option are Strong , Median or Auto . Manufacturer's Setting Note: The user should always set this option to Mode 0.
  • Page 88 BIOS User's Manual Hard Disk Power Down Mode This option specifies the power conserving state that the hard disk drive enters after the specified period of hard drive inactivity has expired. The settings are Disabled , Standby or Suspend . Note: The Optimal default setting for this option is Suspend and the Fail-Safe default setting is Disabled .

  • Page 89: Pci/Pnp Setup

    Chapter 5: Running Setup no display activity for the length of time specified in the Standby Timeout (Minute) option, the computer enters a power-saving state. The settings are Monitor or Ignore . Device 6 (Serial port 1) Device 7 (Serial port 2) Device 8 (Parallel port) Device 5 (Floppy disk) Device 0 (Primary Master IDE)
  • Page 90 BIOS User's Manual PCI Latency Timer (PCI Clocks) This option specifies the latency timings in the PCI clocks for all PCI devices. The settings are 32 , 64 , 96 , 128 , 160 , 192 , 224 or 248 . PCI VGA Palette Snoop The settings for this option are Disabled or Enabled.
  • Page 91 Chapter 5: Running Setup Offboard PCI IDE Primary IRQ Offboard PCI IDE Secondary IRQ These options specify the PCI interrupt used by the primary (or second- ary) IDE channel on the offboard PCI IDE controller. The settings are Disabled , Hardwired , INTA , INTB , INTC or INTD . PCI Slot1 IRQ Priority PCI Slot2 IRQ Priority PCI Slot3 &...

  • Page 92: Peripheral Setup

    BIOS User's Manual IRQ14 and 15 will not be available if the onboard PCI IDE is enabled. If all IRQs are set to ISA/EISA and IRQ14 and 15 are allocated to the onboard PCI IDE, IRQ 9 will still be available for PCI and PnP devices. This is because at least one IRQ must be available for PCI and PnP devices.
  • Page 93 CPU1 Fan CPU2 Fan Thermal Control Fan The above features are for PC Health Monitoring. Motherboards with W83781D have seven onboard voltage monitors for the CPU core, the CPU I/O, +3.3V, +5V, -5V, +12V and -12V, and three fan-status monitors.
  • Page 94 BIOS User's Manual Serial PortB Mode The settings for this option are Normal, IrDA or ASK IR . When set to IrDA, the IR Duplex Mode becomes available and can be set to either Half or Full. When set to ASK IR, the IrDA Protocol becomes available and can be set to 1.6 us or 3/16.

  • Page 95: Security Setup

    Chapter 5: Running Setup Parallel Port DMA Channel This option is only available if the setting of the parallel port mode option is ECP . The settings are 0 , 1 , 2 , 3 , 5 , 6 or 7 . Note: The option is N/A . Onboard IDE This option specifies the onboard IDE controller channels to be used.

  • Page 96: Utility Setup

    BIOS User's Manual Utility Setup Anti-Virus When this icon is selected, AMIBIOS issues a warning when any program (or virus) issues a disk format command or attempts to write to the boot sector of the hard disk drive. Language Note: The Optimal and Fail-Safe default settings for this option are English.
  • Page 97 Chapter 5: Running Setup Notes 5-23...

  • Page 98: Appendix A: Bios Error Beep Codes And Messages

    Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes & Messages During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Nonfatal errors are those which, in most cases, allow the system to continue the boot-up process.
  • Page 99 BIOS User’s Manual Beeps Error message Refresh Failure Parity Error Base 64 KB Memory Failure Timer Not Operational Processor Error 8042 - Gate A20 Failure Processor Exception Interrupt Error Display Memory Read/Write Error ROM Checksum Error CMOS Shutdown Register Read/Write Error Refer to the table on page A-3 for solutions to the error beep codes.
  • Page 100 If it beeps... 1, 2, 3 times 6 times 8 times 9 times 4, 5, 7, or 10 times Appendix A: BIOS Error Beep Codes then ... reseat the DIMM memory. system still beeps, replace the memory. reseat the keyboard controller chip. If it still beeps, replace the keyboard controller.
  • Page 101 BIOS User’s Manual Error Message 8042 Gate -- A20 Error Address Line Short! C: Drive Error C: Drive Failure Cache Memory Bad CH-2 Timer Error CMOS Battery State Low CMOS Checksum Failure CMOS System Option Not Set CMOS Display Type Mismatch CMOS Memory Size Mismatch...
  • Page 102 Error Message CMOS Time and Date Not Set D: Drive Error D: Drive Failure Diskette Boot Failure Display Switch Not Proper DMA Error DMA #1 Error DMA #2 Error FDD Controller Failure HDD Controller Failure INTR #1 Error INTR #2 Error Appendix A: BIOS Error Beep Codes Information Run Standard Setup to set the date and time...
  • Page 103 BIOS User’s Manual Error Message Invalid Boot Diskette Keyboard Is Locked... Unlock It Keyboard Error KB/Interface Error No ROM BASIC Off Board Parity Error On Board Parity Error Parity Error???? Information The BIOS can read the disk in floppy drive A:, but cannot boot the computer.

  • Page 104: Appendix B: Amibios Post Diagnostic Error Messages

    Appendix B: AMIBIOS POST Diagnostics Error Messages AMI BIOS POST Diagnostic Error This section describes the power-on self-test's (POST) port 80 codes for the AMI BIOS. Check Point Description Code copying to specific areas is done. to INT 19h boot loader next. NMI is Disabled.
  • Page 105 BIOS User’s Manual Check Point Description keyboard Next, issuing the pin 23 and 24 blocking and unblocking commands. Next, checking if the <End or <Ins> keys were pressed during Initialize option was set in AMIBCP or if the <End> key was pressed.
  • Page 106 Appendix B: AMIBIOS POST Diagnostics Error Messages Check Point Description Initialization before setting the video mode is complete. Configuring settings next. Bus initialization system, static, and output devices will be done next, if present. Passing control required configuration before the video ROM test. All necessary processing before passing control to the video ROM is done.
  • Page 107 BIOS User’s Manual Check Point Description Initializing the bus input, IPL and general devices next, if present. Displaying bus initialization error messages. The new cursor position has been read and saved. Displaying the Hit <DEL> message next. Preparing the descriptor tables next. The descriptor tables are prepared.
  • Page 108 Appendix B: AMIBIOS POST Diagnostics Error Messages Check Point Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset.
  • Page 109 BIOS User’s Manual Check Point Description The DMA page register test passed. DMA Controller 1 base register test next. Performing the DMA Controller 2 base register test next. Programming DMA Controllers 1 and 2 next. Completed Initializing the 8259 interrupt controller next. Extended NMI source enabling is in progress.
  • Page 110 Appendix B: AMIBIOS POST Diagnostics Error Messages Check Point Description programming been completed. code and executing the AMIBIOS Setup or WINBIOS Setup utility next. Returned from WINBIOS Setup and cleared the screen. Performing any necessary programming after WINBIOS Setup next. programming completed.
  • Page 111 BIOS User’s Manual Check Point Description Any initialization required after the option ROM test has been completed. printer base address next. Set the timer and printer base addresses. RS-232 base address next. Returned Performing coprocessor test next. Required over. Initializing the coprocessor next. Coprocessor initialization after the coprocessor test next.
  • Page 112 Appendix B: AMIBIOS POST Diagnostics Error Messages Check Point Description Returned Next, performing the E000 option ROM had control. Initialization been completed. Displaying the system configuration next. Building the multiprocessor table, if necessary. POST next. The system configuration is displayed. Uncompressing the DMI data and initializing DMI.
  • Page 113 BIOS User’s Manual If either <Ctrl><Home>was pressed or the system BIOS checksum is bad, the system will next go to checkpoint code E0h. Otherwise, it will go to checkpoint code D7h. B-10...

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