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Supero SUPER PIIIDR3 User Manual

Supermicro piiidr3 motherboards: user guide
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UPER
SUPER PIIIDR3
SUPER PIIIDRE
USER'S MANUAL
Revision 2.0

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  • Page 1 ® UPER SUPER PIIIDR3 SUPER PIIIDRE USER’S MANUAL Revision 2.0...
  • Page 2 Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

  • Page 3: About This Manual

    Instructions are also included for contacting technical support. In addition, you can visit our web site at www.supermicro.com/ techsupport.htm for more detailed information. Chapter 4 includes an introduction to the BIOS used in the PIIIDR3/PIIIDRE and provides detailed information on the CMOS Setup utility. Preface ®...
  • Page 4 UPER PIIIDR3/PIIIDRE User’s Manual Appendix A offers information on BIOS error beep codes and messages. Appendix B provides post diagnostic error messages.

  • Page 5: Table Of Contents

    Chapter 1: Introduction Overview ... 1-1 Checklist ... 1-1 Contacting Supermicro ... 1-2 SUPER PIIIDR3 Image ... 1-4 SUPER PIIIDRE Image ... 1-5 SUPER PIIIDR3 Layout ... 1-6 SUPER PIIIDRE Layout ... 1-8 840 Chipset: System Block Diagram ... 1-10 Motherboard Features ...
  • Page 6 UPER PIIIDR3/PIIIDRE User’s Manual Overheat LED ... 2-10 Extra Universal Serial Bus Connection ... 2-10 Speaker ... 2-11 Infrared Header ... 2-11 Fan Headers ... 2-11 Serial Ports ... 2-11 ATX PS/2 Keyboard and Mouse Ports ... 2-12 Universal Serial Bus Connector ... 2-12 CD Headers ...
  • Page 7 Losing the System’s Setup Configuration ... 3-2 Technical Support Procedures ... 3-2 Frequently Asked Questions ... 3-3 Returning Merchandise for Service ... 3-6 Chapter 4: BIOS Introduction ... 4-1 BIOS Features ... 4-2 Running Setup ... 4-2 Standard CMOS Setup ... 4-4 Advanced CMOS Setup ...
  • Page 8 UPER PIIIDR3/PIIIDM3/PIIIDME User’s Manual Notes viii...

  • Page 9: Chapter 1 Introduction

    One (1) 68-pin LVD SCSI cable One (1) set of SCSI driver diskettes One (1) SCSI manual One (1) Supermicro CD containing drivers and utilities One (1) URM (Univeral Retention Mechanism for the CPU - preinstalled) One (1) User's/BIOS Manual...

  • Page 10: Contacting Supermicro

    UPER PIIIDR3/PIIIDRE User's Manual CONTACTING SUPERMICRO Headquarters Address: Super Micro Computer, Inc. 2051 Junction Avenue San Jose, CA 95131 U.S.A. Tel: +1 (408) 895-2001 Fax: +1 (408) 895-2008 E-mail: marketing@supermicro.com (General Information) support@supermicro.com (Technical Support) Web site: www.supermicro.com European Office Address: Super Micro Computer B.V.
  • Page 11 Chapter 1: Introduction Notes...

  • Page 12: Super Piiidr3 Image

    UPER PIIIDR3/PIIIDRE User's Manual SUPER PIIIDR3 Figure 1-1. SUPER PIIIDR3 Image...

  • Page 13: Super Piiidre Image

    Chapter 1: Introduction SUPER PIIIDRE Figure 1-2. SUPER PIIIDRE Image...

  • Page 14: Super Piiidr3 Layout

    UPER PIIIDR3/PIIIDRE User's Manual Figure 1-3. SUPER PIIIDR3 Layout PS/2 KB PS/2 MOUSE Parallel Port LINE IN LINE OUT PCI 1 JP11 PCI 2 PCI 3 PCI 4 PCI64 #1 PCI64 #2 Also see the figure on page 2-6 for the locations of the I/O ports and 2-7 for the Front Control Panel (JF1) connectors.
  • Page 15 Jumpers Description SCSI Termination (p. 2-16) JBT1 CMOS Clear (p. 2-14) Front Side Bus Speed (p. 2-15) Pin 1-2 (CPU Select) JP4/4A Manufacturer's Setting Host Bus ECC (p. 2-15) AC97 Audio (p. 2-15) JP10 Overheat Alarm (p. 2-16) JP11 Onboard LAN/NIC (p. 2-16) JP13 P/S Failure Alarm (p.

  • Page 16: Super Piiidre Layout

    UPER PIIIDR3/PIIIDRE User's Manual Figure 1-4. SUPER PIIIDRE Layout PS/2 KB PS/2 MOUSE Parallel Port LINE IN LINE OUT PCI 1 JP11 PCI 2 PCI 3 PCI 4 PCI64 #1 PCI64 #2 Also see the figure on page 2-6 for the locations of the I/O ports and 2-7 for the Front Control Panel (JF1) connectors.
  • Page 17 Jumpers Description JBT1 CMOS Clear (p. 2-14) Front Side Bus Speed (p. 2-15) Pin 1-2 (CPU Select) JP4/4A Manufacturer's Setting Host Bus ECC (p. 2-15) AC97 Audio (p. 2-15) JP10 Overheat Alarm (p. 2-16) JP11 Onboard LAN/NIC (p. 2-16) JP13 P/S Failure Alarm (p.

  • Page 18: Chipset: System Block Diagram

    UPER PIIIDR3/PIIIDRE User's Manual Pentium III/II Pentium III/II 133/100 MHz Host Bus RIMM Slots AGP Pro/4x 33 MHz PCI Slots AC'97 66 MHz P64H 1.5 Mb/sec PCI Slots 241 BGA U S B SuperI/O ATA66 IDE BIOS 4Mb Ports Figure 1-5. 840 Chipset:...
  • Page 19 Features of the PIIIDR3/PIIIDRE • Single or dual Pentium II 350-450 MHz processors at 100 MHz bus speed or single or dual Pentium III 450-933 MHz processors at 133/100 MHz bus speed Note: Please refer to the support section of our web site for a complete listing of supported processors.
  • Page 20 CD Utilities • BIOS flash upgrade utility • Drivers for 840 chipset utilities Dimensions • SUPER PIIIDR3 - Extended ATX: 12" x 11.95" (305 x 304 mm) • SUPER PIIIDRE - Extended ATX: 12" x 11.95" (305 x 304 mm) 1-12...

  • Page 21: Chipset Overview

    Chipset Overview Intel’s 840 chipset is based on the new modular design introduced by the 800 series chipsets and consisting of three main components. The 82840 Memory Controller Hub (MCH) provides support for 4x/2xAGP and AGP Pro. (AGP Pro is a superset of 4xAGP.) connects the PCI slots, IDE controllers and USB ports to the MCH via an accelerated hub architecture.

  • Page 22: Pc Health Monitoring

    The default setting is Always OFF. PC Health Monitoring This section describes the PC health monitoring features of the SUPER PIIIDR3/PIIIDRE. Both have an onboard System Hardware Monitor chip that supports PC health monitoring. Seven Onboard Voltage Monitors for the CPU Core, Chipset Voltage, +3.3V, 5V and 12V...
  • Page 23 message to the screen. Users can adjust the voltage thresholds to define the sensitivity of the voltage monitor. Four-Fan Status Monitor with Firmware/Software On/Off Control The PC health monitor can check the RPM status of the cooling fans. The onboard 3-pin CPU and chassis fans are controlled by the power manage- ment functions.

  • Page 24: 1-4 Acpi/Pc 98 Features

    UPER PIIIDR3/PIIIDRE User's Manual Hardware BIOS Virus Protection The system BIOS is protected by hardware so that no virus can infect the BIOS area. The user can only change the BIOS content through the flash utility provided by SUPERMICRO. infecting the BIOS area and destroying valuable data.
  • Page 25 quests. Slow Blinking LED for Suspend-State Indicator When the CPU goes into a suspend state, the chassis power LED will start blinking to indicate that the CPU is in suspend mode. When the user presses any key, the CPU will wake-up and the LED will automatically stop blinking and remain on.

  • Page 26: Power Supply

    It is even more important for processors that have high CPU clock rates of 300 MHz and above. The SUPER PIIIDR3/PIIIDRE accommodates ATX power supplies. Although most power supplies generally meet the specifications required by the CPU, some are inadequate.
  • Page 27 Chapter 1: Introduction It also provides two high-speed, 16550 compatible serial communication ports (UARTs), one of which supports serial infrared communication. Each UART includes a 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and a processor interrupt sys- tem.
  • Page 28 UPER PIIIDR3/PIIIDRE User's Manual Notes 1-20...

  • Page 29: Chapter 2 Installation

    Static-Sensitive Devices Static-sensitive electrical discharge can damage electronic components. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from static discharge. Precautions • Use a grounded wrist strap designed to prevent static discharge. •...

  • Page 30: Processor Installation

    UPER PIIIDR3/PIIIDRE User's Manual Processor Installation When handling the direct pressure on the label area of the fan. The following pages cover the installation procedure. You should install the processor to the motherboard first, then install the motherboard in the chas- sis, then the memory and add-on cards, and finally the cables and drivers.

  • Page 31: Mounting The Motherboard In The Chassis

    Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chassis. Use the mounting holes to orient the motherboard to the mother- board tray in the chassis. Chassis may include a variety of mounting fas- teners made of metal, plastic or both.

  • Page 32: Installing Rimms

    RAMBUS Support (Important!) The Memory Controller Hub (MCH) enables the use of RAMBUS in the RIMM slots on the PIIIDR3/PIIIDRE. This hub supports both ECC and non- ECC type memory. Check the Memory ECC Mode BIOS setting to enable the use of ECC. (See Section 1-2 for more on the MCH.) Also, be aware that PC800 RAMBUS can only be used when running at a 133 MHz FSB speed.
  • Page 33 Figure 2-2. Side View of RIMM Installation into Slot Notch Note: Notches should align with their receptive points on the slot. To Install: With the tabs pulled outward, insert the RIMM module vertically and press down straight down until it snaps into place.

  • Page 34: Port/Control Panel Connector Locations

    UPER PIIIDR3/PIIIDRE User's Manual Port/Control Panel Connector Locations The I/O ports are color coded in conformance with the PC 99 specification. See Figure 2-3 below for the colors and locations of the various I/O ports. Figure 2-3. Parallel Port Mouse...
  • Page 35 Front Control Panel JF1 contains header pins for various front control panel connectors. See Figure 2-4 for the pin definitions of the speaker, overheat LED, keyboard lock, chassis intrusion, I2C, USB0, reset, power on, hard drive LED and power LED headers, which are all located on JF1. Please note that even and odd numbered pins are on opposite sides.

  • Page 36: Connecting Cables

    UPER PIIIDR3/PIIIDRE User's Manual Connecting Cables (see previous page for JF1 connection locations) Power Supply Connector After you have securely installed the motherboard, memory and add-on cards, you are ready to connect the cables. ATX power supply cable to J27 making sure the tabs on both con- nectors are aligned.

  • Page 37: Pwr_On

    PWR_ON The PWR_ON connection is lo- cated on pins 11 and 13 of JF1. Momentarily contacting both pins will power on/off the system. The user can also configure this but- ton to function as a suspend but- ton. (See the Power Button Mode setting in BIOS.) To turn off the power when set to suspend mode,...

  • Page 38: Chassis Intrusion

    UPER PIIIDR3/PIIIDRE User's Manual Chassis Intrusion The Chassis Intrusion connection is located on pin 20 of JF1. See Table 2-9 for pin definitions. Keyboard Lock The Keyboard Lock connection is located on pins 22 and 24 of JF1. See Table 2-10 for pin definitions.

  • Page 39: Speaker

    Speaker The speaker connection is located on pins 28, 30, 32 and 34 of JF1. See Table 2-13 for pin definitions. Infrared Header A 6-pin header for infrared de- vices is located just below JF1 on the motherboard. See Table 2-14 for pin definitions.

  • Page 40: Atx Ps/2 Keyboard And Mouse Ports

    UPER PIIIDR3/PIIIDRE User's Manual ATX PS/2 Keyboard and PS/2 Mouse Ports The ATX PS/2 keyboard and the PS/2 mouse are located on J13. See Table 2-17 for pin definitions. (The mouse port is above the key- board port. See Figure 2-3.)

  • Page 41: Wake-On-Ring

    PWR_LED pin on JL1 to provide indication of a power failure on the chassis. This feature is only available when using Supermicro power supplies. See Table 2-23 for pin definitions. Chapter 2: Installation Table 2-21 Wake-On-Ring Pin...

  • Page 42: Sled1 (Scsi Led) Indicator

    UPER PIIIDR3/PIIIDRE User's Manual SLED1 (SCSI LED) Indicator (not on PIIIDRE) The SLED connector is used to pro- vide an LED indication of SCSI ac- tivity. Refer to Table 2-24 for con- necting the SCSI LED. Jumper Settings Explanation of...

  • Page 43: Front Side Bus Speed

    Front Side Bus Speed Use JP3 to change the FSB speed. You can also change the CPU speed with the "CPU Speed at FSB" setting in BIOS. This setting will show you the actual CPU speed for each FSB speed option selected.

  • Page 44: Scsi Termination Enable/Disable

    UPER PIIIDR3/PIIIDRE User's Manual SCSI Termination Enable/ Disable (not on PIIIDRE) Jumper JA1 allows you to enable or disable termination for the SCSI connectors. The normal (default) position is open to enable SCSI termination. See Table 2-29 for jumper settings.

  • Page 45: Power Supply Failure Alarm Enable/Disable

    Power Supply Failure Alarm Enable/Disable The system will notify you in the event of a power supply failure. This alarm assumes that your chassis has three power supply units, with one acting as a backup. If you only have one or two power supply units installed, you should disable this with JP13 to prevent false alarms.

  • Page 46: Parallel Port Connector

    UPER PIIIDR3/PIIIDRE User's Manual Table 2-33 Parallel (Printer) Port Pin Definitions (J22) Pin Number Function Pin Number Strobe- Data Bit 0 Data Bit 1 Data Bit 2 Data Bit 3 Data Bit 4 Data Bit 5 Data Bit 6 Data Bit 7...

  • Page 47: Agp Pro Slot

    AGP Pro Slot The AGP Pro slot is backward compatible with AGP and 4xAGP graphics cards, which have fewer pins than AGP Pro cards. care must be taken when installing a graphics card into this slot, as doing so incorrectly can damage your motherboard. For AGP Pro cards, you should remove the orange sticker covering one end of the slot.

  • Page 48: Ultra Wide Scsi Connector

    UPER PIIIDR3/PIIIDRE User's Manual Ultra Wide SCSI Connector Refer to Table 2-37 for the Ultra Wide SCSI pin definitions. connector is located at JA5. Pin Number Table 2-37 Ultra Wide SCSI Connector (JA5) Function Pin Number Function G N D...

  • Page 49: Ultra160 Scsi Connectors

    Ultra160 SCSI Connector Refer to Table 2-38 for pin definitions for the Ultra160 SCSI connector located at JA2. Table 2-38 68-pin Ultra160 SCSI Connector (JA2) Connector Connector Contact N u m b e r Signal Names +DB(12) +DB(13) +DB(14) +DB(15) +DB(P1) +DB(0) +DB(1)

  • Page 50: Installing Software Drivers

    Installing Software Drivers After all the hardware has been installed you must install the software drivers. The necessary drivers are all included on the Supermicro CD that came packaged with your motherboard. CDROM drive, the display shown in Figure 2-5 should appear. (If this dis- play does not appear, click on the My Computer icon and then on the icon representing your CDROM drive.

  • Page 51: Chapter 3 Troubleshooting

    Troubleshooting Procedures Use the following procedures to troubleshoot your system. followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. before adding, changing or installing any hardware components. Before Power On 1.

  • Page 52: Memory Errors

    Technical Support Procedures Before contacting Technical Support, please take the following steps. Also, note that as a motherboard manufacturer, Supermicro does not sell directly to end-users, so it is best to first check with your distributor or reseller for troubleshooting services.

  • Page 53: Frequently Asked Questions

    What are the various types of memory that the PIIIDR3/ PIIIDRE motherboard can support? Answer: The PIIIDR3/PIIIDRE has 4 RIMM sockets, which support up to 2 GB RDRAM. Use 300/400 MHz (600/800 MB/sec) RIMM modules for RAMBUS. Both ECC and non-ECC RDRAM are supported. Check the Memory ECC Mode setting in BIOS to enable the use of ECC.
  • Page 54 Answer: It is recommended that you do not upgrade your BIOS if you are experiencing no problems with your system. Updated BIOS files are located on our web site at http://www.supermicro.com. Please check our BIOS warning message and the info on how to update your BIOS on our web site.
  • Page 55 IRQs. See Table 3-1 below for details on shared IRQs. Table 3-1. Shared IRQs PIIIDR3/PIIIDRE PCI 1 shares an IRQ with the NIC and the AGP Pro slot PCI 2 shares an IRQ with the onboard audio and the SM bus*...

  • Page 56: Returning Merchandise For Service

    UPER PIIIDR3/PIIIDRE User's Manual Question: I installed my microphone correctly but I can't record any sound. What should I do? Answer: Go to <Start>, <Programs>, <Accessories>, <Entertainment> and then <Volume Control>. devices in the menu and check the box beside "Microphone".

  • Page 57: Chapter 4: Bios

    Introduction This chapter describes the AMIBIOS for the PIIIDR3/PIIIDRE. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily upgraded using a floppy disk-based program. Note: Due to periodic changes to BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.

  • Page 58: Bios Features

    UPER PIIIDR3/PIIIDRE User's Manual BIOS Features • Supports Plug and Play V1.0A and DMI 2.1 • Supports Intel PCI 2.2 (Peripheral Component Interconnect) local bus specification • Supports Advanced Power Management (APM) specification v 1.1 • Supports ACPI • Supports Flash ROM AMIBIOS supports the LS120 drive made by Matsushita-Kotobuki Electronics Industries Ltd.
  • Page 59 AMIBIOS HIFLEX SETUP UTILITY VERSION 1.18 © 1998 American Megatrends, Inc. All Rights Reserved. PCI / PLUG AND PLAY SETUP CHANGE SUPERVISOR PASSWORD CHANGE LANGUAGE SETTING AUTO CONFIGURATION WITH OPTIMAL SETTINGS AUTO CONFIGURATION WITH FAIL-SAFE SETTINGS Standard CMOS setup for changing time, date, hard disk type, etc.

  • Page 60: Standard Cmos Setup

    UPER PIIIDR3/PIIIDRE User's Manual Standard CMOS Setup Date and Time Configuration Select the Standard option. Select the Date/Time icon. The current values for each category are displayed. Enter new values through the keyboard. Floppy A Floppy B Choose the Floppy Drive A or B icon to specify the floppy drive type. The settings are Not Installed, 360 KB 5¼...

  • Page 61: Advanced Cmos Setup

    Entering Drive Parameters You can also enter the hard disk drive parameters. The drive parameters are: Parameter Description Type The number for a drive with certain identification parameters. Cylinders The number of cylinders in the disk drive. H e a d s The number of heads.
  • Page 62 UPER PIIIDR3/PIIIDRE User's Manual AMIBIOS checks for a <Del> key press and runs AMIBIOS Setup if the key has been pressed. Enabled AMIBIOS does not test system memory above 1 MB. AMIBIOS does not wait up to 40 seconds for a READY signal from the IDE hard disk drive.
  • Page 63 The settings for this option are BIOS or Silent . If selected as BIOS, the POST will start with the normal sign-on message screen. If Silent is selected, the POST will start with the Supermicro screen Display Mode at Add-On ROM Init The settings for this option are Force BIOS or Keep Current .
  • Page 64 UPER PIIIDR3/PIIIDRE User's Manual The settings for this option are Disabled or Enabled . * Note: S.M.A.R.T. cannot predict all future device failures. S.M.A.R.T. should be used as a warning tool, not as a tool to predict the device reli- a b i l i t y .

  • Page 65: Advanced Chipset Setup

    Chapter 4: BIOS setting is Disabled. Set this option to Enabled to permit the contents of F0000h RAM memory segment to be written to and read from cache memory. Processor Serial Number Intel included a serial number in their Pentium III processors as a unique system identifier.
  • Page 66 UPER PIIIDR3/PIIIDRE User's Manual PC/PCIB Select Enable The settings for this option are Enabled or Disabled . Search for MDA Resources The settings for this option are Yes or No. AC97 Audio Controller This setting is used to switch the onboard audio on and off. The settings for this option are Enabled or Disabled .

  • Page 67: Power Management

    Chapter 4: BIOS Power Management NOTE: APM is automatically installed. If using ACPI, changes to the following settings up to and including LAN Wake-Up will have no affect. If you prefer to use ACPI, refer to the instructions on initializing ACPI on page 1-22.
  • Page 68 UPER PIIIDR3/PIIIDRE User's Manual Green PC Monitor Power State This option specifies the power state that the green PC-compliant video monitor enters when AMIBIOS places it in a power savings state after the specified period of display inactivity has expired. The settings are Standby and Off .
  • Page 69 Chapter 4: BIOS Advanced SMI Enable Controls Timer Overflow Enable This allows the system to generate a System Management Interrupt after a specific amount of time has passed. The settings are Enabled and Disabled . Thermal SMI Enable This allows the system to generate a System Management Interrupt after a specific temperature has been exeeded.

  • Page 70: Pci/Plug And Play Setup

    UPER PIIIDR3/PIIIDRE User's Manual RTC Alarm Minute This allows you to set a time at which the system will wake-up. The setting is a number representing the alarm minute. RTC Alarm Second This allows you to set a time at which the system will wake-up. The setting is a number representing the alarm second.
  • Page 71 Chapter 4: BIOS Aware. Set this option to No if the operating system (such as DOS, OS/ 2, Windows 3.x) does not use PnP. You must set this option correctly. Otherwise, PnP-aware adapter cards installed in the computer will not be configured properly.
  • Page 72 UPER PIIIDR3/PIIIDRE User's Manual Offboard PCI IDE Primary IRQ Offboard PCI IDE Secondary IRQ These options specify the PCI interrupt used by the primary (or secondary) IDE channel on the offboard PCI IDE controller. The settings are Disabled , Hardwired , INTA , INTB , INTC , and INTD .

  • Page 73: Peripheral Setup

    Chapter 4: BIOS least one IRQ must be available for PCI and PnP devices. The settings are PCI/PnP or ISA/EISA. (See page 3-5 for information on shared IRQs.) Reserved Memory Size This option specifies the size of the memory area reserved for legacy ISA adapter cards.
  • Page 74 Chassis Fan1 Chassis Fan2 The above features are for PC Health Monitoring. The motherboards with W83781D have seven onboard voltage monitors for the CPU core, CPU I/ O, +3.3V, +5V, -5V, +12V, and -12V, and for the four-fan status monitor.

  • Page 75: Auto-Detect Hard Disks

    data transfer driven by the host device. Use ECP (Extended Capabilities Port) to achieve data transfer rates of up to 2.5 Mbps. ECP uses the DMA protocol and provides symmetric bidirectional Note: The Optimal default setting for this communication. option is ECP and the Fail-Safe setting is Normal . EPP Version The settings are Enabled and Disabled .

  • Page 76: Change Language Setting

    UPER PIIIDR3/PIIIDRE User's Manual The system can be configured so that all users must enter a password every time the system boots or when the AMIBIOS setup is executed. You can set either a Supervisor password or a User password.

  • Page 77: Exit Without Saving

    Chapter 4: BIOS Exit Without Saving Highlight this and hit <Enter> when you wish to exit back to the system boot-up procedure without saving any changes. 4-21...
  • Page 78 UPER PIIIDR3/PIIIDRE User's Manual Notes 4-22...
  • Page 79 Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes & Messages During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
  • Page 80 UPER PIIIDR3/PIIIDRE User's Manual Beeps Error message Refresh Failure Parity Error Base 64 KB Memory Failure Timer Not Operational Processor Error 8042 - Gate A20 Failure Processor Exception Interrupt Error Display Memory Read/Write Error ROM Checksum Error CMOS Shutdown Register Read/Write Error Refer to the table on page A-3 for solutions to the error beep codes.
  • Page 81 If it beeps... then ... 1, 2, 3 times reseat the DIMM memory. If the system still beeps, replace the memory. 6 times reseat the keyboard controller chip. If it still beeps, replace the keyboard controller. If it still beeps, try a different keyboard, or replace the keyboard fuse, if the keyboard has one.
  • Page 82 UPER PIIIDR3/PIIIDRE User's Manual Error Message 8042 Gate -- A20 Error Address Line Short! C: Drive Error C: Drive Failure Cache Memory Bad CH-2 Timer Error CMOS Battery State Low CMOS Checksum Failure CMOS System Option Not Set CMOS Display Type...
  • Page 83 Error Message CMOS Time and Date Not Set D: Drive Error D: Drive Failure Diskette Boot Failure Display Switch Not Proper DMA Error DMA #1 Error DMA #2 Error FDD Controller Failure HDD Controller Failure INTR #1 Error INTR #2 Error Appendix A: BIOS Error Beep Codes Information Run Standard Setup to set the date and time...
  • Page 84 UPER PIIIDR3/PIIIDRE User's Manual Error Message Invalid Boot Diskette Keyboard Is Locked... Unlock It Keyboard Error KB/Interface Error No ROM BASIC Off Board Parity Error On Board Parity Error Parity Error???? Information The BIOS can read the disk in floppy drive A:, but cannot boot the computer.

  • Page 85: Appendix B: Amibios Post Diagnostic Error Messages

    Appendix B: AMIBIOS POST Diagnostic Error Messages AMIBIOS POST Diagnostic Error Messages This section describes the power-on self-tests (POST) port 80 codes for the AMIBIOS. Check Point Description Code copying to specific areas is done. to INT 19h boot loader next. NMI is Disabled.
  • Page 86 UPER PIIIDR3/PIIIDRE User's Manual Check Point Description The keyboard controller command byte is written. Next, issuing the pin 23 and 24 blocking and unblocking commands. Next, checking if the <End or <Ins> keys were pressed during Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the <End>...
  • Page 87 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description Initialization before setting the video mode is complete. Configuring the monochrome mode and color mode settings next. Bus initialization system, static, output devices will be done next, if present. Passing control to the video ROM to perform any required configuration before the video ROM test.
  • Page 88 UPER PIIIDR3/PIIIDRE User's Manual Check Point Description Initializing the bus input, IPL, and general devices next, if present. Displaying bus initialization error messages. The new cursor position has been read and saved. Displaying the Hit <DEL> message next. Preparing the descriptor tables next.
  • Page 89 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset.
  • Page 90 UPER PIIIDR3/PIIIDRE User's Manual Check Point Description The DMA page register test passed. DMA Controller 1 base register test next. The DMA controller 1 base register test passed. Performing the DMA controller 2 base register test next. The DMA controller 2 base register test passed.
  • Page 91 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description programming been completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next. Returned from WINBIOS Setup and cleared the screen. Performing any necessary programming after WINBIOS Setup next.
  • Page 92 UPER PIIIDR3/PIIIDRE User's Manual Check Point Description Any initialization required after the option ROM test has been completed. printer base address next. Set the timer and printer base addresses. RS-232 base address next. Returned Performing Coprocessor test next. Required initialization before the Coprocessor test is over.
  • Page 93 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description Returned Next, performing the E000 option ROM had control. Initialization completed. Displaying the system configuration next. Building the multiprocessor table, if necessary. POST next. The system configuration is displayed. Uncompressing the DMI data and initializing DMI. Copying any code to specific areas.
  • Page 94 UPER PIIIDR3/PIIIDRE User's Manual Notes B-10...

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