Schematic Diagram; Digital Board - Panasonic KX-FT932BR-B Service Manual

Personal facsimile
Table of Contents

Advertisement

KX-FT932BR-B

17 Schematic Diagram

17.1. Digital Board

MOTOR BLOCK
+24V
M
R2
F1
1.25A
R1
820
1.5K 3/4W
Q1
+5V
BR4
IC7
D502
D505
BR1
BR6
CN3
9
10V
D501
10V
1
COM
10
RM3
2
11
3
RM2
12
RM1
4
13
5
RM0
14
+24LV
15
16
(BLEEDER PATTERN FOR EVALUATION)
THERMAL HEAD
Q7
BLOCK
8
1
7
2
6
3
+24VF
+24VF
5
4
DG
Q4
+2.5VD
PG
CN4
COM
1
R13
100
2
LATCH
STB1
3
C12
+3.3VD
4
GND
Z0.1u
+3.3V
5
RA102
6
TM
L21
1
8
2
7
CLOCK
7
0
3
6
4
5
8
GND
100
STB2
9
10
DATA
COM
11
MOTOR POSITION
+5V
SENSOR
RA110
CN5
3
2
2
4
1
4.7k
1
DG
DG
CUTTER POSITION
+5V
SENSOR
4.7k
CN6
4
1
3
2
2
NC
RA111
1
DG
DG
OPE-PANEL BLOCK
+24V
+24LV
CN7
+5V
F2
0.25A
1
MIC
2
+5V
3
DG
RA101
1
8
4
KSTART
2
7
3
6
5
KLATCH
4
5
6
KRXD
0
7
KTXD
100
L2
0
3
2
8
KSCLK
4
1
9
OPERST
RA112
10
NC
DG
TO POWER
+5V
+5V
SUPPLY
Q9
CN1
9
PCONT
DG
+6V
+6V
8
+6V
7
+6V
6
GND
IC15
DG
5
GND
4
GND
2
+24V
PG
DG
3
+24V
2
+24V
1
+24V
DG
RXE
Q2
DG
GND
8
7
RM3
6
RM2
5
RM1
4
RM0
3
BLEEDER_ON
2
PG
1
PG
+24V
DG
Q6
Q5
HEADON
THLAT
STB1
THCLK
THDAT
STB2
DG
MOT_POS
MOT_POS
CUT_POS
ACK_EN
CISON
RLY
CUT_POS
KSTART
KLATCH
KSCLK
KTXD
KRXD
OPRESET
+24V
+5V
KSTART
KLATCH
KRXD
KTXD
KSCLK
OPRESET
H/L control
DG
PWRCNT
+5VA
+5VA
R70
0
DG
DG
+3.3VD
+3.3VD
+5V
+5V TO +3.3VD REG
+3.3VD
IC3
+5V
VOUT
1
5
VDD
CE
VIN
3
VSS
2
GND
1
3
4
VOUT
VDET
DG
DG
DG
RESET
4M DRAM
IC4
A[4]
D[0]
10
2
A0
DQ1
A[5]
D[1]
11
3
A1
DQ2
A[6]
D[2]
12
4
A2
DQ3
A[7]
D[3]
13
5
A3
DQ4
RBA[0]
D[4]
16
24
A4
DQ5
RBA[1]
D[5]
17
25
A5
DQ6
RBA[2]
D[6]
18
26
A6
DQ7
RBA[3]
D[7]
19
27
A7
DQ8
RBA[4]
20
A8
RBA[5]
9
A9R
+3.3VD
6
+3.3VD
NC6
21
14
NC21
VCC-14
1
VCC-1
7
WE
22
OE
8
15
RAS
VSS-15
23
28
CAS
VSS-28
DG
RXE
TH-TMP
XRESET
+3.3VD
+2.5VD
STB1
STB2
C151
+5V
Z0.1u
C153
109
110
Z0.1u
111
112
113
XWDERR
114
115
THDAT
116
THCLK
R151
117
4.7K
THLAT
118
119
RM0
120
RM1
121
RM2
122
RM3
123
RXE
124
C154
125
Z0.1u
126
127
128
129
130
131
132
133
134
135
136
137
138
R152
22K
139
C155
Z0.1u
140
141
3
2
142
+3.3VD
DG
4
1
143
CA102
144
+3.3VA
AIN2
DG
DG
K0.1u
DG
+3.3V/BATIN
+3.3VD TO +2.5V
+2.5VD
+2.5VD
Q10
DG
DG
146
4M FLASH
FOR PROGRAM
IC2
A0
A[0]
A[0]
20
21
A0
D0
A[1]
A[1]
A1
19
22
A1
D1
A[2]
A[2]
A2
18
23
A2
D2
A[3]
A[3]
A3
17
25
A3
D3
A4
A[4]
A[4]
16
26
A4
D4
A[5]
A[5]
A5
15
27
A5
D5
A[6]
A[6]
A6
14
28
A6
D6
A[7]
A[7]
A7
13
29
A7
D7
A8
A[8]
A[8]
3
A8
A[9]
A[9]
A9
2
A9
A[10]
A[10]
A10
31
A10
A[11]
A[11]
A11
1
A11
A[12]
A[12]
A12
12
7
A12
WE
RBA[0]
RBA[0]
A13
4
8
A13
VDD
RBA[1]
RBA[1]
A14
5
24
A14
VSS
RBA[2]
RBA[2]
A15
11
A15
RBA[3]
RBA[3]
A16
10
A16
RBA[4]
RBA[4]
A17
6
A17
RBA[5]
A18
30
CE
32
9
OE
A18
RBA[5]
RD
WR
+3.3VD
CE2
CE1
R102
10K
J2
+3.3VD
ROMCS MFCS
IC11
1 INB
5
VCC
2
INA
3
4
GND
OUT
Z0.1u
C105
DG
RBA6
C179
Z0.1u
VSS
VDD3.3V
XDRESET
VDD5.0V
VSS
XRESETI
XWDERR
THDAT
THCLK
THLAT
STBNP
RM0/IOP00
RM1/IOP01
RM2/IOP02
RM3/IOP03
RXE/IP04
TM0/IOP10
VDD2.5V
IC1
VSS
TM1/IOP11
TM2/IOP12
TM3/IOP13
TXE/IP14
KSTART
KLATCH
KSCLK
KTXD
KRXD
MICLK/IOP46
FMEMCLK/IOP24
MIDAT/IOP45
FMEMDI/IOP25
VDD3.3V
ADSEL1
VDDA2.5V
VREFB
VCL
FMEND0/IOP26
VREFT
VSSA
C161
AMON
X1
BR2
2
1
32.768KHz
R156
( )
NC
DG
FTG
+3.3V/BATIN TO
+2.5V/BATIN
+2.5V/BATIN
+3.3V/BATIN
+3.3V/BATIN
+2.5V/BATIN
R77
( )
NC
DG
DG
D[0]
D[1]
D[2]
D[0]
D0
D[3]
D[1]
D1
D[4]
D[2]
D2
D[5]
D[3]
D3
D[6]
D[4]
D4
D[7]
D[5]
D5
D[6]
D6
D[7]
D7
+3.3VD
DG
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
C176
Z0.1u
VSS
72
VDD3.3V
71
DB5
70
DB1
69
DB4
68
DB2
67
DB3
66
(12)
XRESCS2/OP71
65
RA106
XCAS2/IOP44
64
1
8
XCAS1/IOP43
63
2
7
XRAS/IOP42
62
3
6
XMDMCS
61
4
5
100
XMDMINT
60
TEST4
59
TEST3
58
TEST2
57
TEST1
56
(13)
XTEST
55
C175
VDD3.3V
54
VSS
53
XIN
52
Z0.1u
(14)
XOUT
51
VDD2.5V
50
ADR13
ADR13/OP
49
ADR14
ADR14/OP
48
ADR15
ADR15/OP
47
XDPRBE/MUX/OP53
46
XHSTWR/IOP41
45
R161
XHSTRD/IOP40
44
(15)
XWAIT/IOP60
43
20KOSC/IOP56
42
3.3K
MILAT/IOP47
41
40
39
38
VSS
37
C171
Z0.1u
C168
K1000p
(16)
XNMI
(17)
(18)
(19)
(20)
(21)
A
B
(22)
(23)
DG
(24)

Advertisement

Table of Contents
loading

Table of Contents