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Asus AAEON BOXER-6652 User Manual

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BOXER-6652
Fanless Embedded Box PC
st
User's Manual 1
Ed
Last Updated: November 20, 2015

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Summary of Contents for Asus AAEON BOXER-6652

  • Page 1 BOXER-6652 Fanless Embedded Box PC User’s Manual 1 Last Updated: November 20, 2015...
  • Page 2 Copyright Notice This document is copyrighted, 2015. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. ® is trademark of Advanced Micro Devices.  ® Microsoft Windows is a registered trademark of Microsoft Corp.  ITE is a trademark of Integrated Technology Express, Inc. ...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity BOXER-6652  Wallmount bracket  Screw Package  RAM Thermal Pad (60mm x 25mm x 3mm)  Phoenix power connector  Product CD with User’s Manual (in pdf) and drivers ...
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 × ○ ○ ○ ○ ○ 及其电子组件 外部信号 × ○ ○ ○ ○ ○ 连接器及线材...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 List of Jumpers ......................7 2.2.1 Front Panel Connector (JP1) ............8 2.2.2 LVDS Port Backlight Lightness Control Mode Selection (JP2) 8 2.2.3 LVDS Port Backlight Control Inverter VCC Selection (JP3) ..
  • Page 12 2.3.6 LVDS Port Inverter / Backlight Connector (CN6)..... 19 2.3.7 UIM Card Sock (Push-Push type) (CN7) ........19 2.3.8 CFast Slot (CN8) ................20 2.3.9 COM Port 6 (Wafer BOX, Optional) (CN9) ....... 21 2.3.10 COM Port 5 (Wafer BOX, Optional) (CN10) ......21 2.3.11 SATA2.0 Connector (CN11) ............
  • Page 13 2.3.34 LAN2 LED (LED 1) ................41 2.3.35 LAN1 LED (LED 2) ................41 2.3.36 LAN1 LED (LED 2) ................42 Installing Components ..................43 2.4.1 Installing MiniCard ................. 44 2.4.2 Installing CFast/ SIM Card ............45 2.4.3 Installing HDD ................. 46 2.4.4 Installing RAM .................
  • Page 14 3.4.4 Advanced: CPU Configuration ............ 65 3.4.5 Advanced: AMT Configuration ........... 67 3.4.6 Advanced: Trusted Computing ........... 68 3.4.7 Advanced: SATA Configuration ........... 69 3.4.8 Advanced: USB Configuration ............. 70 3.4.9 Advanced: Dynamic Digital IO ............ 71 Setup submenu: Chipset ..................72 3.5.1 Chipset: PCH-IO Configuration...........

  • Page 15: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 16: Specifications

    Specifications System ® Intel 4th Generation CPU Processor  204-pin DDR3L 1333/1600 MHz SODIMM x 1, System Memory  up to 16 GB ® Intel QM87 PCH Chipset  Onboard CFast slot x 1 Storage  2.5" SATA HDD/SSD drive bay x 1 3-pin terminal block x 1 Rear I/O Panel ...
  • Page 17 LAN1 Tx LED x 1 LAN1 Rx LED x 1 LAN2 Tx LED x 1 LAN2 Rx LED x 1 Mini Card slot x 2 (USB & PCIe signal) Expansion Slot  ® Windows OS Support  ® Windows ® Windows Embedded Standard 7 ®...
  • Page 18 Anti-Shock 50 G peak acceleration (11 msec.  duration)-CFast 20 G peak acceleration (11 msec. duration)-HDD CE/FCC Class A  Power Supply 9 ~ 30 V, AT or ATX DC Input  Chapter 1 – Product Specifications...

  • Page 19: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 20: Dimensions

    Dimensions BOXER-6652 Chapter 2 – Hardware Information...

  • Page 21: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function Front Panel Connector LVDS Port Backlight Lightness Control Mode Selection LVDS Port Backlight Control Inverter VCC Selection LVDS Port Operating VDD Selection AT/ATX Control Selection COM2 Ring Function Selection...

  • Page 22: Front Panel Connector (Jp1)

    2.2.1 Front Panel Connector (JP1) Function PWR_BTN- PWR_BTN+ HDD_LED- HDD_LED+ SPEAKER- SPEAKER+ PWR_LED PWR_LED+ H/W RESET- H/W RESET+ 2.2.2 LVDS Port Backlight Lightness Control Mode Selection (JP2) 1 2 3 1 2 3 VR Mode (Default) PWM Mode Chapter 2 – Hardware Information...

  • Page 23: Lvds Port Backlight Control Inverter Vcc Selection (Jp3)

    2.2.3 LVDS Port Backlight Control Inverter VCC Selection (JP3) 1 2 3 1 2 3 +12V +5V (Default) 2.2.4 LVDS Port Operating VDD Selection (JP4) 1 2 3 1 2 3 +12V +3.3V (Default) 2.2.5 AT/ATX Control Selection (JP5) AT(Default) 2.2.6 COM2 Ring Function Selection (JP6) Chapter 2 –...

  • Page 24: Com1 Ring Function Selection (Jp7)

    2.2.7 COM1 Ring Function Selection (JP7) 2.2.8 COM4 Function Mode Selection (JP8) RS-422 RS-232(Default) RS-485 Driver Half RS-485 Receiver Duplex Half Duplex 2.2.9 COM3 Function Mode Selection (JP9) RS-422 RS-232(Default) RS-485 Driver Half RS-485 Receiver Duplex Half Duplex 2.2.10 COM4 Termination Selection (DCD4) (JP10) Chapter 2 –...

  • Page 25: Com4 Termination Selection (Dtr4) (Jp11)

    No Termination (Default) Termination With 120 ohm 2.2.11 COM4 Termination Selection (DTR4) (JP11) No Termination (Default) Termination With 120 ohm 2.2.12 COM3 Termination Selection (DCD4) (JP12) No Termination (Default) Termination With 120 ohm 2.2.13 COM3 Termination Selection (DTR4) (JP13) No Termination (Default) Termination With 120 ohm 2.2.14 Clear COMS1 Jumper (CN23)

  • Page 26: Clear Coms2 Jumper (Cn24)

    2.2.15 Clear COMS2 Jumper (CN24) 1 2 3 1 2 3 Normal (Default) Clear CMOS Chapter 2 – Hardware Information...

  • Page 27: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function Audio Connector LVDS Port COM Port 5 and 6 (D-SUB9) +5V/+12V Output for SATA HDD USB2.0 Port 6 and 7 LVDS Port Inverter / Backlight Connector UIM Card Sock (Push-Push type) CFast Slot...
  • Page 28 CN29 USB2.0 Port 8 and 9 (Wafer BOX, Optional) CN30 USB3.0 (Wafer BOX, Optional) CN31 Adapter Power in Connector CN32 LAN (RJ-45)+Dual USB3.0+USB2.0 CN33 HDMI Port CN34 LAN (RJ-45)+Dual USB2.0 CN35 COM Port 1 and 2 (D-SUB 9) CN36 COM Port 3 and 4 (D-SUB 9) CN37 External Power Input CN38...

  • Page 29: Audio Connector (Cn1)

    2.3.1 Audio Connector (CN1) Pin name Signal Type Signal Level MIC_L MIC_R LIN_L LIN_R LOUT_L LOUT_R +VDD_AUD 2.3.2 LVDS Port (CN2) Chapter 2 – Hardware Information...
  • Page 30 Pin Name Signal Type Signal Level LVDS_BKLTEN LVDS_BKLCTL_CON +VDD_LVDS LVDSA_CLK# DIFF LVDSA_CLK DIFF +VDD_LVDS LVDSA_DATA0# DIFF LVDSA_DATA0 DIFF LVDSA_DATA1# DIFF LVDSA_DATA1 DIFF LVDSA_DATA2# DIFF LVDSA_DATA2 DIFF LVDSA_DATA3# DIFF LVDSA_DATA3 DIFF LVDS_DDC_DATA DIFF LVDS_DDC_CLK DIFF LVDSB_DATA0# DIFF LVDSB_DATA0 DIFF LVDSB_DATA1# DIFF LVDSB_DATA1 DIFF LVDSB_DATA2#...

  • Page 31: Com Port 5 And 6 (D-Sub9) (Cn3)

    LVDSB_CLK# DIFF LVDSB_CLK DIFF 2.3.3 COM Port 5 and 6 (D-SUB9) (CN3) Pin Name Signal Type Signal Level DCD5 DTR5 DSR5 CTS5 DCD6 DTR6 DSR6 CTS6 Chapter 2 – Hardware Information...

  • Page 32: 12V Output For Sata Hdd (Cn4)

    2.3.4 +5V/+12V Output for SATA HDD (CN4) Pin Name Signal Type Signal Level +12V 2.3.5 USB2.0 Port 6 and 7 (CN5) Pin Name Signal Type Signal Level +V5A_USB_6_7 USBD6- DIFF USBD6+ DIFF +V5A_USB_6_7 Chapter 2 – Hardware Information...

  • Page 33: Lvds Port Inverter / Backlight Connector (Cn6)

    USBD7- DIFF USBD7+ DIFF 2.3.6 LVDS Port Inverter / Backlight Connector (CN6) Pin Name Signal Type Signal Level +VCC_LVDS_BKLT +5V/+12V L_BKLTNESS LVDS_BKLTEN 2.3.7 UIM Card Sock (Push-Push type) (CN7) Pin Name Signal Type Signal Level UIM_PWR1 UIM_RST1 UIM_CLK1 UIM_VPP1 UIM_DAT1 DET1 Chapter 2 –...

  • Page 34: Cfast Slot (Cn8)

    2.3.8 CFast Slot (CN8) Pin Name Signal Type Signal Level CFast_TXN2_C DIFF CFast_RXN2_C DIFF PC10 PC12 PC14 +3.3V PC16 CFast_TXN2_C DIFF CFast_RXN2_C DIFF PC10 PC12 PC14 +3.3V PC16 Chapter 2 – Hardware Information...

  • Page 35: Com Port 6 (Wafer Box, Optional) (Cn9)

    2.3.9 COM Port 6 (Wafer BOX, Optional) (CN9) Pin Name Signal Type Signal Level ± 5V ± 5V +5V/ +12V 2.3.10 COM Port 5 (Wafer BOX, Optional) (CN10) Pin Name Signal Type Signal Level Chapter 2 – Hardware Information...

  • Page 36: Sata2.0 Connector (Cn11)

    ± 5V ± 5V +5V/ +12V 2.3.11 SATA2.0 Connector (CN11) Pin Name Signal Type Signal Level SATA_TXP1_C DIFF SATA_TXN1_C DIFF SATA_RXN1_C DIFF SATA_RXP1_C DIFF 2.3.12 +5V / SATA Power Connector (CN12) Chapter 2 – Hardware Information...

  • Page 37: Pson# Output (Cn13)

    Pin Name Signal Type Signal Level 2.3.13 PSON# Output (CN13) Pin Name Signal Type Signal Level PS_ON# 2.3.14 PCIe Connector (CN14) Standard specification 2.3.15 +3.3V and +5V Output (CN15) Pin Name Signal Type Signal Level 3.3V Chapter 2 – Hardware Information...

  • Page 38: Sata2.0 Connector (Cn16)

    2.3.16 SATA2.0 Connector (CN16) Pin Name Signal Type Signal Level SATA_TXP DIFF SATA_TXN DIFF SATA_RXN DIFF SATA_RXP DIFF 2.3.17 MiniCard Slot (Full-MiniCard) (CN17) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V +1.5V +1.5V PCIE_CLK_REQ# UIM_PWR Chapter 2 – Hardware Information...
  • Page 39 UIM_DATA PCIE_REF_CLK- DIFF UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF Chapter 2 – Hardware Information...

  • Page 40: Minicard Slot (Half-Minicard) (Cn18)

    USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V 2.3.18 MiniCard Slot (Half-MiniCard) (CN18) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V +1.5V +1.5V PCIE_CLK_REQ# UIM_PWR Chapter 2 – Hardware Information...
  • Page 41 UIM_DATA PCIE_REF_CLK- DIFF UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF Chapter 2 – Hardware Information...

  • Page 42: Ps/2 Keyboard/Mouse Combo Port (Cn19)

    USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V 2.3.19 PS/2 Keyboard/Mouse Combo Port (CN19) Pin Name Signal Type Signal Level KB_DATA KB_CLK +V5A_KBMS MS_DATA MS_CLK Chapter 2 – Hardware Information...

  • Page 43: Pch Digital Io Port (Cn20)

    2.3.20 PCH Digital IO Port (CN20) Pin Name Signal Type Signal Level PCH_GPIO0 PCH_GPIO1 PCH_GPIO2 PCH_GPIO3 2.3.21 UIM Card Socket (CN21) Pin Name Signal Type Signal Level UIM_PWR1 UIM_RST1 UIM_CLK1 UIM_VPP1 UIM_DAT1 Chapter 2 – Hardware Information...

  • Page 44: Digital Io Port (Cn22)

    2.3.22 Digital IO Port (CN22) Pin Name Signal Type Signal Level DIO_0 DIO_1 DIO_2 DIO_3 DIO_4 DIO_5 DIO_6 DIO_7 VCC_5V0 2.3.23 LPC Port (CN26) Chapter 2 – Hardware Information...

  • Page 45: Usb2.0 Port 8 And 9 (Wafer Box, Optional) (Cn29)

    Pin Name Signal Type Signal Level LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 VCC_3V3 LPC_FRAME# BUF_PLT_RST# CLK_PCI_FIN PCH_DRQ#0 PCH_DRQ#1 INT_SERIRQ 2.3.24 USB2.0 Port 8 and 9 (Wafer BOX, Optional) (CN29) Pin Name Signal Type Signal Level +V5A_USB_8_9 USBD8- DIFF USBD8+ DIFF USBD9+ DIFF Chapter 2 –...

  • Page 46: Usb3.0 (Wafer Box, Optional) (Cn30)

    USBD9- DIFF +V5A_USB_8_9 2.3.25 USB3.0 (Wafer BOX, Optional) (CN30) Pin Name Signal Type Signal Level +V5A_USB_2_3 USB3_RX0_BH_N USB3_RX0_BH_P USB3_TX0_BH_N USB3_TX0_BH_P USBD2- USBD2+ USBD3+ USBD3- USB3_TX1_BH_P USB3_TX1_BH_N Chapter 2 – Hardware Information...

  • Page 47: External Power Input (Cn31)

    USB3_RX1_BH_P USB3_RX1_BH_N +V5A_USB_2_3 2.3.26 External Power Input (CN31) Pin Name Signal Type Signal Level +VIN_EXT GND_EARTH 2.3.27 LAN (RJ-45)+Dual USB3.0+USB2.0 (CN32) Pin Name Signal Type Signal Level LAN1_MDI0P LAN1_MDI0N LAN1_MDI1P LAN1_MDI1N LAN1_MDI2P Chapter 2 – Hardware Information...
  • Page 48 LAN1_MDI2N LAN1_MDI3P LAN1_MDI3N Pin Name Signal Type Signal Level +V5A_USB_0_1 USBD0- DIFF USBD0+ DIFF USB3_RX0_CON_N DIFF USB3_RX0_CON_P DIFF USB3_TX0_CON_N DIFF USB3_TX0_CON_P DIFF +V5A_USB_0_1 USBD1- DIFF USBD1+ DIFF USB3_RX1_CON_N DIFF USB3_RX1_CON_P DIFF USB3_TX1_CON_N DIFF USB3_TX1_CON_P DIFF Chapter 2 – Hardware Information...

  • Page 49: Hdmi Port (Cn33)

    2.3.28 HDMI Port (CN33) Pin Name Signal Type Signal Level HDMI_DATA2_P DIFF HDMI_DATA2_N DIFF HDMI_DATA1_P DIFF HDMI_DATA1_N DIFF HDMI_DATA0_P DIFF HDMI_DATA0_N DIFF HDMI_CLK_P DIFF HDMI_CLK_N DIFF HDMI_SCL HDMI_SDA +5V_HDMI HDMI_HPD Chapter 2 – Hardware Information...

  • Page 50: Lan (Rj-45)+ Dual Usb2.0 (Cn34)

    2.3.29 LAN (RJ-45)+ Dual USB2.0 (CN34) Pin Name Signal Type Signal Level LAN2_MDI0P LAN2_MDI0N LAN2_MDI1P LAN2_MDI1N LAN2_MDI2P LAN2_MDI2N LAN2_MDI3P LAN2_MDI3N Pin Name Signal Type Signal Level +V5A_USB_4_5 USBD4- DIFF USBD4+ DIFF +V5A_USB_4_5 USBD5- DIFF Chapter 2 – Hardware Information...

  • Page 51: Com Port 1 And 2 (D-Sub 9) (Cn35)

    USBD5+ DIFF 2.3.30 COM Port 1 and 2 (D-SUB 9) (CN35) Pin Name Signal Type Signal Level DCD1 ± 5V ± 5V DTR1 DSR1 CTS1 +5V/+12V DCD2 ± 5V ± 5V DTR2 DSR2 CTS2 +5V/+12V Chapter 2 – Hardware Information...

  • Page 52: Com Port 3 And 4 (D-Sub 9) (Cn36)

    2.3.31 COM Port 3 and 4 (D-SUB 9) (CN36) Pin Name Signal Type Signal Level DCD3 ± 5V ± 5V DTR3 DSR3 CTS3 +5V/+12V DCD4 ± 5V ± 5V DTR4 DSR4 CTS4 +5V/+12V Chapter 2 – Hardware Information...

  • Page 53: Adapter Power In Connector (Cn37)

    2.3.32 Adapter Power in Connector (CN37) Pin Name Signal Type Signal Level +VIN_EXT GND_PRI GND_EARTH 2.3.33 VGA+DVI-D Port (CN38) Pin Name Signal Type Signal Level DVI_DATA2_N DIFF DVI_DATA2_P DIFF DVI_DDC_SCL DVI_DDC_SDA Chapter 2 – Hardware Information...
  • Page 54 DVI_DATA1_N DIFF DVI_DATA1_P DIFF +V5S_DVI_CON DVI_HPD DVI_DATA0_N DIFF DVI_DATA0_P DIFF DVI_CLK_P DIFF DVI_CLK_N DIFF DDC_CLK +V5S_DISP HSYNC GREEN Chapter 2 – Hardware Information...

  • Page 55: Lan2 Led (Led 1)

    CRT_PLUG VSYNC BLUE DDC_DAT 2.3.34 LAN2 LED (LED 1) Pin Name Signal Type Signal Level +3.3V LAN2_LINK_ACT# LAN2_1000# LAN2_100# 2.3.35 LAN1 LED (LED 2) Pin Name Signal Type Signal Level +3.3V LAN1_LINK_ACT# Chapter 2 – Hardware Information...

  • Page 56: Lan1 Led (Led 2)

    LAN1_1000# LAN1_100# 2.3.36 LAN1 LED (LED 2) Pin Name Signal Type Signal Level HDD_LED- PWR_LED- Chapter 2 – Hardware Information...

  • Page 57: Installing Components

    Installing Components To installing components such as hard disks and RAMs, you will have to access the system’s interior. Please follow the instructions below to do so. Remove the stands Remove the base Chapter 2 – Hardware Information...

  • Page 58: Installing Minicard

    2.4.1 Installing MiniCard Slot the MiniCard into the slot diagonally Secure the card with screws Chapter 2 – Hardware Information...

  • Page 59: Installing Cfast/ Sim Card

    2.4.2 Installing CFast/ SIM Card Remove the cover to insert the cards Chapter 2 – Hardware Information...

  • Page 60: Installing Hdd

    2.4.3 Installing HDD Place the HDD onto the bracket plate and secure with screws Chapter 2 – Hardware Information...
  • Page 61 Place the assembly onto the baseplate and secure with screws Chapter 2 – Hardware Information...

  • Page 62: Installing Ram

    2.4.4 Installing RAM Slot the RAM diagonally into the RAM slot and push down to secure Chapter 2 – Hardware Information...
  • Page 63 Place the thermal pad onto the RAM Place the cover onto the RAM, tighten the screws to secure the cover Chapter 2 – Hardware Information...

  • Page 64: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 65: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.

  • Page 66: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...

  • Page 67: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...

  • Page 68: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...

  • Page 69: F81866 Super Io Configuration

    3.4.1 F81866 Super IO Configuration Chapter 3 – AMI BIOS Setup...

  • Page 70: F81866 Super Io Configuration: Serial Port

    3.4.1.1 F81866 Super IO Configuration: Serial Port 1 Configuration Options summary: Disabled Serial Port Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Auto Optimal Default, Failsafe Default IO=3E8h; IRQ=4; IO=3F8h; Change Settings IRQ=3,4,5,6,7,10,11,12; IO=2E8h; IRQ=3,4,5,6,7,10,11,12; IO=3E8h; IRQ=10; IO=2E8h;...

  • Page 71: F81866 Super Io Configuration: Serial Port

    3.4.1.2 F81866 Super IO Configuration: Serial Port 2 Configuration Options summary: Disabled Serial Port Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Auto Optimal Default, Failsafe Default IO=2E8h; IRQ=3; Change Settings IO=3F8h; IRQ=3,4; IO=2F8h; IRQ=3,4; IO=3E8h; IRQ=3,4; IO=2E8h;...

  • Page 72: F81866 Super Io Configuration: Serial Port

    3.4.1.3 F81866 Super IO Configuration: Serial Port 3 Configuration Options summary: Disabled Serial Port Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Auto Optimal Default, Failsafe Default IO=3E8h; IRQ=10; IO=3E8h; IRQ=10; Change Settings IO=2E8h; IRQ=10; IO=2D0h; IRQ=10; IO=2C0h;...

  • Page 73: F81866 Super Io Configuration: Serial Port

    3.4.1.4 F81866 Super IO Configuration: Serial Port 4 Configuration Options summary: Disabled Serial Port Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Auto Optimal Default, Failsafe Default IO=2E8h; IRQ=10; IO=3E8h; IRQ=10; Change Settings IO=2E8h; IRQ=10; IO=2D0h; IRQ=10; IO=2C0h;...

  • Page 74: F81866 Super Io Configuration: Serial Port

    3.4.1.5 F81866 Super IO Configuration: Serial Port 5 Configuration Options summary: Disabled Serial Port Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Auto Optimal Default, Failsafe Default IO=2F0h; IRQ=10; IO=3E8h; IRQ=10; Change Settings IO=2E8h; IRQ=10; IO=2D0h; IRQ=10; IO=2C0h;...

  • Page 75: F81866 Super Io Configuration: Serial Port

    3.4.1.6 F81866 Super IO Configuration: Serial Port 6 Configuration Options summary: Disabled Serial Port Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Auto Optimal Default, Failsafe Default IO=2E0h; IRQ=10; IO=3E8h; IRQ=10; Change Settings IO=2E8h; IRQ=10; IO=2D0h; IRQ=10; IO=2C0h;...

  • Page 76: Advanced: F81866 H/W Monitor

    3.4.2 Advanced: F81866 H/W Monitor Chapter 3 – AMI BIOS Setup...

  • Page 77: Advanced: Power Management

    3.4.3 Advanced: Power Management Options summary: ATX Type Optimal Default, Failsafe Default Power Mode AT Type Select power supply mode. Suspend Disabled ACPI Sleep State S3 only(Suspend to RAM) Optimal Default, Failsafe Default Select ACPI sleep state the system will enter when the SUSPEND button is pressed. Power Off Restore on Power Power On...
  • Page 78 Disabled Resume on Ring Enabled Optimal Default, Failsafe Default Enable/Disable Resume from RI# signal Disabled Optimal Default, Failsafe Default RTC wake system Fixed Time from S5 Dynamic Time Enable or disable System wake on alarm event. When enabled, System will wake on the hr::min::sec specified Chapter 3 –...

  • Page 79: Advanced: Cpu Configuration

    3.4.4 Advanced: CPU Configuration Chapter 3 – AMI BIOS Setup...
  • Page 80 Options summary: Disabled Hyper-threading Enabled Optimal Default, Failsafe Default Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper-Threading Technology). When Disabled only one thread per enabled core is enabled. Disabled Intel Virtualization Technology...

  • Page 81: Advanced: Amt Configuration

    3.4.5 Advanced: AMT Configuration Options summary: Disabled Intel AMT Enabled Optimal Default, Failsafe Default Enable/Disable Intel (R) Active Management Technology BIOS Extension. Note : iAMT H/W is always enabled. This option just controls the BIOS extension execution. If enabled, this requires additional firmware in the SPI device Disabled Optimal Default, Failsafe Default Un-Configure ME...

  • Page 82: Advanced: Trusted Computing

    3.4.6 Advanced: Trusted Computing Options summary: Security Device Disabled Optimal Default, Failsafe Default Support Enabled Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. Chapter 3 – AMI BIOS Setup...

  • Page 83: Advanced: Sata Configuration

    3.4.7 Advanced: SATA Configuration Options summary: Enabled Optimal Default, Failsafe Default SATA controller(s) Disabled Enable or disable SATA Device. Optimal Default, Failsafe Default SATA Mode Selection AHCI Determines how SATA controller(s) operate. Chapter 3 – AMI BIOS Setup...

  • Page 84: Advanced: Usb Configuration

    3.4.8 Advanced: USB Configuration Options summary: Enabled Optimal Default, Failsafe Default Legacy USB Support Disabled Auto Enables Legacy USB support. AUTO option disables legacy support if no USB devices are connected. DISABLE option will keep USB devices available only for EFI applications. Smart Auto Optimal Default, Failsafe Default USB3.0 Support...

  • Page 85: Advanced: Dynamic Digital Io

    3.4.9 Advanced: Dynamic Digital IO Options summary: Input Optimal Default, Failsafe Default DIO[3:0] Direction Output Set Digital IO as Input or Output Input DIO[7:4] Direction Output Optimal Default, Failsafe Default Set Digital IO as Input or Output Optimal Default, Failsafe Default DIO[3:0] Output Level Set Digital IO Output as Hi or Low Chapter 3 –...

  • Page 86: Setup Submenu: Chipset

    Setup submenu: Chipset Chapter 3 – AMI BIOS Setup...

  • Page 87: Chipset: Pch-Io Configuration

    3.5.1 Chipset: PCH-IO Configuration Options summary: Auto Optimal Default, Failsafe Default PCIe X1 (CN14) Gen1 Gen2 Select PCI Express X1 (CN14) port speed. Auto Optimal Default, Failsafe Default PCIe X1 (CN25) Gen1 Gen2 Select PCI Express X1 (CN25) port speed. Auto Optimal Default, Failsafe Default Mini-Card (CN18)
  • Page 88 Enable or disable onboard NIC. Disabled Azalia Enabled Auto Optimal Default, Failsafe Default Control Detection of the Azalia device Disabled = Azalia will be unconditionally disabled Enabled = Azalia will be unconditionally Enabled Auto = Azalia will be enabled if present, disabled otherwise. Chapter 3 –...

  • Page 89: Chipset: System Agent (Sa) Configuration

    3.5.2 Chipset: System Agent (SA) Configuration Options summary: Primary Display Auto Optimal Default, Failsafe Default IGFX PCIE Select which of IGFX/PEG/PCI Graphics device should be Primary Display. Auto Optimal Default, Failsafe Default Internal Graphics Disabled Enabled Keep IGD enabled based on the setup options. VBIOS Default Optimal Default, Failsafe Default Primary IGFX Boot...

  • Page 90: System Agent (Sa) Configuration: Memory

    3.5.2.1 System Agent (SA) Configuration: Memory Configuration Chapter 3 – AMI BIOS Setup...

  • Page 91: Setup Submenu: Boot

    Setup submenu: Boot Options summary: Disabled Quiet Boot Enabled Default En/Disable showing boot logo. Disabled Default Launch I217-LM PXE OpROM Enabled Enable or Disable Legacy Boot Option for I217-LM. Disabled Default Launch I211-AT PXE OpROM Enabled Enable or Disable Legacy Boot Option for I211-AT. Chapter 3 –...

  • Page 92: Boot: Bbs Priorities

    3.6.1 Boot: BBS Priorities Chapter 3 – AMI BIOS Setup...

  • Page 93: Setup Submenu: Security

    Setup submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password is set. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers).

  • Page 94: Setup Submenu: Save & Exit

    Setup submenu: Save & Exit Chapter 3 – AMI BIOS Setup...

  • Page 95: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 96: Product Cd/Dvd

    Product CD/DVD The BOXER-6652 comes with a product CD that contains all the drivers and utilities you need to setup your product. Insert the CD and follow the steps in the autorun program to install the drivers. In case the program does not start, follow the sequence below to install the drivers. Step 1 –...
  • Page 97 Step 5 – Install LAN Driver Open the Step5 - LAN folder and select your OS Open the .exe file in the folder Follow the instructions Drivers will be installed automatically Step 6 – Install RAID_AHCI Driver Open the Step6 - RAID_AHCI folder followed by SetupRST.exe Follow the instructions Drivers will be installed automatically Step 7 –...

  • Page 98: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...

  • Page 99: Watchdog Timer Initial Program

    A.1 Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value...
  • Page 100 ******************************************************************************** // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
  • Page 101 ************************************************************************************ VOID Main(){ // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
  • Page 102 *********************************************************************************** // Procedure : AaeonWDTEnable VOID AaeonWDTEnable (){ WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (){ // Disable WDT counting WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 0); // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting(); VOID WDTEnableDisable(byte LDN, byte Register, byte BitNum, byte Value){ SIOBitSet(LDN, Register, BitNum, Value);...
  • Page 103 ************************************************************************************ VOID SIOEnterMBPnPMode(){ IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); VOID SIOExitMBPnPMode(){ IOWriteByte(SIOIndex, 0xAA); VOID SIOSelectLDN(byte LDN){ IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, LDN); VOID SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value){ Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData);...

  • Page 104: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...

  • Page 105: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 106 Appendix B – I/O Information...

  • Page 107: Memory Address Map

    Memory Address Map Appendix B – I/O Information...

  • Page 108: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...
  • Page 109 Appendix B – I/O Information...
  • Page 110 Appendix B – I/O Information...
  • Page 111 Appendix B – I/O Information...
  • Page 112 Appendix B – I/O Information...
  • Page 113 Appendix B – I/O Information...
  • Page 114 Appendix B – I/O Information...
  • Page 115 Appendix B – I/O Information...
  • Page 116 Appendix B – I/O Information...
  • Page 117 Appendix B – I/O Information...

  • Page 118: Dma Channel Assignments

    DMA Channel Assignments Appendix B – I/O Information...

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