Cherry Theobroma PX30-mQ7 User Manual page 45

11.3.7 GPIO
Q7 Signal Type
GPIO[0-7] I/O
11.3.8 CAN
Q7 Signal Type
CAN0_TX O
CAN0_RX I
11.3.9 SPI
Q7 Signal Type
SPI_MOSI O
SPI_MISO I
SPI_SCK O
SPI_CS0# O
SPI_CS1# O
11.3.10 UART
UART0 , as specified in the Q7 standard, is implemented including hardware flow control. This UART shows up in Linux as
/dev/ttyS0 .
Q7 Signal Type
UART0_TX O
UART0_RX I
UART0_CTS# I
UART0_RTS# O
A second UART, UART1 , can be enabled on the GPIO pins. This UART shows up in Linux as /dev/ttyS5 .
Q7 Signal
GPIO5
GPIO6
PX30-uQ7 User Manual
© Theobroma Systems Design und Consulting GmbH
Q7 Signal
LVDS_B0_P
LVDS_B0_N
LVDS_B1_P
LVDS_B1_N
LVDS_B2_P
LVDS_B2_N
LVDS_B3_P
LVDS_B3_N
LVDS_B_CLK_P
LVDS_B_CLK_N
Signal Description
Level
3.3V General purpose inputs/outputs 0 to 7
Signal Description
Level
3.3V CAN (Controller Area Network) TX output for CAN Bus channel 0
3.3V CAN (Controller Area Network) RX input for CAN Bus channel 0
Signal Description
Level
3.3V Master serial output/Slave serial input signal
3.3V Master serial input/Slave serial output signal
3.3V SPI clock output
3.3V SPI chip select 0 output
3.3V SPI chip select 1 output (used when two devices are connected)
Signal Description
Level
3.3V Serial data transmit
3.3V Serial data receive
3.3V Handshake signal: ready to send data
3.3V Handshake signal: ready to receive data
Alternate function Type
UART1_TX O
UART1_RX I
Function
CSI_D0+
CSI_D0-
CSI_D1+
CSI_D1-
CSI_D2+
CSI_D2-
CSI_D3+
CSI_D3-
CSI_CLK+
CSI_CLK-
Signal Level Description
3.3V Serial data transmit
3.3V Serial data receive
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