1. Manuals
  2. Brands
  3. ARTERY Manuals
  4. Controller
  5. AT32F403A Series
  6. Quick start manual

ARTERY AT32F403A Series Quick Start Manual

Hide thumbs Also See for AT32F403A Series:
Table of Contents

Advertisement

Quick Links

Download this manual
Introduction
This application note mainly introduces:
1. How to configure and modify the clock source code based on the BSP_V2.x.x provided by Artery.
2. How to use the accessary clock configuration tools to set clock path and parameters to generate
and use the corresponding clock code.
Applicable products:
Part number
2022.06.10
AT32F403A/407 CRM Quick Start Guide
AT32F403A/407 CRM Quick Start Guide
AT32F403Axx
AT32F407xx
1
AN0082
Application Note
Ver 2.0.4

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the AT32F403A Series and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Related Manuals for ARTERY AT32F403A Series

Summary of Contents for ARTERY AT32F403A Series

  • Page 1 Introduction This application note mainly introduces: 1. How to configure and modify the clock source code based on the BSP_V2.x.x provided by Artery. 2. How to use the accessary clock configuration tools to set clock path and parameters to generate and use the corresponding clock code.

  • Page 2: Table Of Contents

    AT32F403A/407 CRM Quick Start Guide Contents Overview ......................6 Clock tree ......................7 Code configuration ..................9 Functions ........................... 9 Clock configuration......................10 3.2.1 CRM reset ......................10 3.2.2 Clock source configuration ..................10 3.2.3 PLL configuration ....................11 3.2.4 Set bus frequency division ..................
  • Page 3 AT32F403A/407 CRM Quick Start Guide Software design....................... 21 Test result......................... 23 Application case 2: Clock fail detector ............24 Introduction ........................24 Resources ........................24 Software design....................... 24 Test result......................... 26 Revision history .................... 27 2022.06.10 Ver 2.0.4...
  • Page 4 AT32F403A/407 CRM Quick Start Guide List of tables Table 1. Document revision history ....................27 2022.06.10 Ver 2.0.4...
  • Page 5 AT32F403A/407 CRM Quick Start Guide List of figures Figure 1. AT32F403A/407 clock tree ....................7 Figure 2. Clock configuration process ................... 10 Figure 3. Startup interface ......................15 Figure 4. Configuration interface ....................16 Figure 5. Menu bar ........................16 Figure 6.

  • Page 6: Overview

    As the necessary condition for the correct and efficient running of chips, proper clock configuration is of great importance. The clock configuration of each AT32 series MCU may be slight different. This application note mainly introduces how to use BSP_V2.x.x provided by Artery to perform clock configuration of the corresponding AT32 MCU series.

  • Page 7: Clock Tree

    AT32F403A/407 CRM Quick Start Guide Clock tree Before configuring the clock, it is necessary to have a comprehensive understanding of the clock tree, with focuses on the clock source, frequency multiplication and system clock. Figure 1. AT32F403A/407 clock tree SCLKSEL HEXT_IN HEXT HEXT OSC...
  • Page 8 AT32F403A/407 CRM Quick Start Guide Figure 1 contains the following key elements: SCLKSEL: The system clock can be selected from HEXT, PLLCLK and HICK. HEXT: It is a high-speed external oscillator that is connected externally to a 4~25 MHz crystal or clock source.

  • Page 9: Code Configuration

    AT32F403A/407 CRM Quick Start Guide Code configuration This section introduces how to use library functions to configure the clock. Functions The interface functions for hardware clock configuration in BSP of the corresponding MCU series are encapsulated and can be called. Functions commonly used for clock configuration are listed below.

  • Page 10: Clock Configuration

    AT32F403A/407 CRM Quick Start Guide void crm_apb1_div_set(crm_apb1_div_type value); /* AHB clock to APB2 clock divider configuration function */ void crm_apb2_div_set(crm_apb2_div_type value); Clock configuration Figure 2 shows the clock configuration process. Figure 2. Clock configuration process CRM Reset Clock Source Enable PLL Configuration Set Bus Frequency Division Switch System Clock...

  • Page 11: Pll Configuration

    AT32F403A/407 CRM Quick Start Guide  HICK The HICK oscillator is clocked by a high-speed RC in the microcontroller. Enable HICK clock source and wait until HICK clock becomes stable. The code is as follows: crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE); /* Enable HICK clock source */ while(crm_flag_get(CRM_HICK_STABLE_FLAG) != SET) /* Wait until HICK stable flag is set */ 3.2.3 PLL configuration...

  • Page 12: Set Bus Frequency Division

    AT32F403A/407 CRM Quick Start Guide 3.2.4 Set bus frequency division The bus frequency division configuration includes SCLK to AHBCLK, AHBCLK to APB1CLK and AHBCLK to APB2CLK. The code to implement AHB bus (SCLK/1) and APB1/APB2 bus (AHBCLK/2) is as follow: crm_ahb_div_set(CRM_AHB_DIV_1);...

  • Page 13: Update Core Frequency

    AT32F403A/407 CRM Quick Start Guide is as follows: crm_sysclk_switch(CRM_SCLK_HEXT); /* Switch system clock source to HEXT */ while(crm_sysclk_switch_status_get() != CRM_SCLK_HEXT) /* Wait until the system clock is switched to HEXT */  PLLCLK When the PLLCLK is used as system clock source, the system clock frequency depends on the actual PLL frequency multiplication and the maximum frequency.
  • Page 14 AT32F403A/407 CRM Quick Start Guide while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) /* Wait until PLL becomes stable */ crm_ahb_div_set(CRM_AHB_DIV_1); /* SCLK/1 is used as AHB bus clock */ crm_apb2_div_set(CRM_APB2_DIV_2); /* AHBCLK/2 is used as APB2 bus clock */ crm_apb1_div_set(CRM_APB1_DIV_2); /* AHBCLK/2 is used as APB1 bus clock */ crm_auto_step_mode_enable(TRUE);...

  • Page 15: Clock Configuration Tools

    AT32F403A/407 CRM Quick Start Guide Clock configuration tools The New Clock Configuration is a graphical configuration tool developed by Artery for configuring the clock of AT32 series MCUs, to help users have a better understanding of the clock path, configure the required frequency and generate source files.

  • Page 16: Menu Bar

    AT32F403A/407 CRM Quick Start Guide Figure 4. Configuration interface Menu bar The menu bar is shown below. Figure 5. Menu bar  Project Create a new configuration project Open Open an existing configuration project Save Save the current configuration project ...

  • Page 17: Clock Configuration Interface

    Clock configuration interface Users can configure the clock path and parameters in the clock configuration interface. Figure 7 shows the clock configuration for AT32F403A series MCU. The clock configuration interface mainly contains four blocks, as shown below. Figure 7. Clock configuration interface 1.

  • Page 18: Figure 8. Clock Configuration Block

    AT32F403A/407 CRM Quick Start Guide Figure 8 illustrates the clock configuration block. The configuration process corresponds to MCU clock tree, which may be slightly different for different MCU series. The clock path can be configured by clicking on each checkbox according to the configuration process, as shown below. Figure 8.

  • Page 19: Generate Code

    AT32F403A/407 CRM Quick Start Guide selected, CLKOUT HICK frequency is also 48 MHz). 13. usbdiv: drop-down box, which is used to configure PLL division factor when PLL clock is selected as the USB clock source. 14. hick to usb: checkbox, which is used to configure USB clocked by PLL clock or HICK 48 MHz. The USB clock configuration code is controlled by the “to usb”...

  • Page 20: Notes

    Notes on using the New Clock Configuration tool: The clock configuration source file generated by the New Clock Configuration tool should be used together with BSP_V2.x.x provided by Artery. The clock configuration source file generated for the specific MCU series should be used in the corresponding project only.

  • Page 21: Application Case 1: Switch System Clock

    AT32F403A/407 CRM Quick Start Guide Application case 1: Switch system clock Introduction Switch the system clock when the system is running. Resources Hardware AT-START BOARD of the corresponding MCU series Software project\at_start_f403a\examples\crm\sysclk_switch Software design Configuration process  Initialize buttons;  Configure PLL/4 for CLKOUT;...
  • Page 22 AT32F403A/407 CRM Quick Start Guide crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE); /* Enable HICK clock source */ while(crm_flag_get(CRM_HICK_STABLE_FLAG) != SET) /* Wait until HICK stable flag is set */ crm_pll_config(CRM_PLL_SOURCE_HICK, CRM_PLL_MULT_16, CRM_PLL_OUTPUT_RANGE_LE72MHZ); /* Configure PLL: select HICK as the PLL clock source; set multiplication factor = 16, and PLL clock output range ≤ 72 MHz; formula: PLLCLK = 8 / 2 * 16 = 64 MHz */ crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);...

  • Page 23: Test Result

    AT32F403A/407 CRM Quick Start Guide the PLL clock source; set multiplication factor = 24, and PLL clock output range >72 MHz; formula: PLLCLK = 8 / 2 * 24 = 96 MHz */ crm_hext_clock_div_set(CRM_HEXT_DIV_2); /* HEXT is divided by 2 */ crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);...

  • Page 24: Application Case 2: Clock Fail Detector

    AT32F403A/407 CRM Quick Start Guide Application case 2: Clock fail detector Introduction The clock fail detector is designed to respond to HEXT clock failure when the HEXT is used as the system clock, directly or indirectly. If a failure is detected on the HEXT clock, a NMI interrupt is generated so that the software can perform rescue operations.
  • Page 25 AT32F403A/407 CRM Quick Start Guide crm_pll_config(CRM_PLL_SOURCE_HICK, CRM_PLL_MULT_60, CRM_PLL_OUTPUT_RANGE_GT72MHZ); /* Configure PLL: select HICK as PLL clock source; set multiplication factor = 60, and PLL clock output range > 72 MHz; formula: PLLCLK = 8 / 2 * 60 = 240 MHz */ crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);...

  • Page 26: Test Result

    AT32F403A/407 CRM Quick Start Guide Test result  A clock failure occurs when the crystal is disconnected or the crystal pin is grounded during operation. Generally, HEXT is more stable than HICK, which is suitable to be used to observe CLKOUT (PA8) output.

  • Page 27: Revision History

    AT32F403A/407 CRM Quick Start Guide Revision history Table 1. Document revision history Date Version Revision note 2021.8.18 2.0.0 Initial release. 2021.9.30 2.0.1 Updated sample code processing flow. 2021.10.21 2.0.2 Updated clock block diagram and partial function name. 2021.11.24 2.0.3 Updated the screenshot of New Clock Configuration tool. Updated the screenshot of New Clock Configuration tool and description of 2022.06.10 2.0.4...
  • Page 28 No license, express or implied, to any intellectual property rights is granted under this document. If any part of this docum ent deals with any third party products or services, it shal l not be deemed a license grant by ARTERY for the use of such third party products or services, or any intellectual property contained therein, or considered as a warranty regarding the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.

This manual is also suitable for:

At32f407 series

Table of Contents