Sony TRINITRON CPD-G200 Service Manual page 5

1 2 3
A
ab1
IIC CLK
ab2
IIC DATA
ab3
ab4
ab5
ab6
B
ab13
R907
C901
100
0.47
1/2W
ab7
B:CHIP
D VCC
4.8
C903
0.01
LOCK
B:CHIP
R915
C902
4.7k
4.2
470
:CHIP
16V
ab9 IIC DATA SDA
4.5
ab8 IIC CLK SCL
C
ab10
V.GND
C905
C938 0.068
4.0
220 :PT
16V
V.OSC H.PH.FI
C906 6.0
1.0
:MPS
V.AGC
1
4.9
V SAW V.SAW
C934
100p
2
4.2
CH:CHIP
E/W E/W VCO.FI
4.9
D ab11
V.SIN V.SIN
6.1
H.AGC DELAY CAP
D937 C913
HZS5.6NB2 0.1
:PT
3
V.DF
4.7
H.DF
0.7 4
H.FLY
H.GND
E
IC902
CXA8071CP
DEF CONTROL
ab12 V-REF
B:CHIP
F
G
ab14 ROTATION
bc2
D
-b
H
bc1 bc3
(DEFLECTION,CPU)
• Divided circuit diagram
One sheet of D board circuit diagram is divided into four
sheets, each having the code D-a to D-d . For example, the
destination ab1 on the D-a sheet is connected to ab1 on the
D-b sheet.
a b 1
Ref. No.
Circuit diagram division code
5-9
4 5 6
LOCK
C936
100p
CH:CHIP
D.GND
D921
X5
MA111
R951
X902 100
0.4
:CHIP
V.IN V-USYNC
5.0
D920
RB501V-40
V.DIV
4.7
H-USYNC
H.IN
HZS5.6NB2
3.6
C930
0.01
HZU5.6B2TRF
:PT
4.9
AFC1
12V
HZU5.6B2TRF
R922
REF V-REF R932
10k
15k
:CHIP
10.2 :CHIP
R929
4.7k
2.4
:CHIP
R934
10k
R.F/V HZU5.6B2TRF
C922 C928
9.4
1.0 0.01
B:CHIP
C927
C923
0.01
C916
470p
B:CHIP
22
CH:CHIP
9V
12V
C917
R931
5.2
0.01
2.2k C924
B:CHIP
:RN-CP C921 22
AFC2
C920 470
0.01 16V
B:CHIP
5.5
H.OUT
D925
Q903
MA111
0.4 R933
2SC2412
1k
D922
H AMP
VCC 1.2k
:CHIP
0.4
D927
C926
C925
470 MA111
0.01
16V
B:CHIP D923
0
C937 C935
D926
0.47 0.47
C918 B:CHIP MA111
10
D924
MA111
R504 R594
0.47 220
:FPRD :CHIP
Q501 5.5
2SC2412
H DRIVE
5.5
5.5
Q502
2SA1037
H DRIVE
C931
470p
CH:CHIP
D914
MA111
bc8 bd2
bc4 bc5 bc6 bc7 bc9 bd1 bd3
7 8 9
IIC CLK
IIC DATA
STBY 5V
DA0 TEST
5.0
DA1 IR
2.7 5 4.8
ROTATION DA2 RESET RESET
D904
1.9
6 HZU5.6B2TRF
S0
H.CENT DA3 PA0
D934
4.9
HZU5.6B2TRF
S1
DA4 PA1
D933
5.0
0.4
HZS5.6NB2
S2
DA5 PA2
0 D932
4.9
HZS5.6NB2
S3
DEGAUSS DA6 PA3
D931
0.4
HZS5.6NB2
S4
DA7 PA4
0.4
D936
LED RED
DA8 PA5
4.4 R954
10k
LED GREEN
VSS2 PA6
:CHIP
D902 7
1.0 R953
10k
VDD2 CBLK CBLANK
:CHIP
8
C914
R920
15p CH:CHIP
1k
0.8 PB7 OSCIN
:CHIP
D928
D938 X901
2.2
24MHz
HZU5.6B2TRF
PB6 OSCOUT
4.8
2.4 C915
15p
PB5 CLKOUT
CH:CHIP D930
4.8
HZU5.6B2TRF
PB4 NC
D929
D918
4.0 HZU5.6B2TRF
PB3 NC
D919
2.8 FB904 STBY 5V
MA111 :CHIP
PB2 NC
5.0
HV PB1 TDO TXD
3.6
5.0
V FLY VFB RDI RXD
R909
9
4.2
4.2 2.2k
:CHIP
V-SYNC VSI1 SDA IIC DATA
R908
5.0
4.6 2.2k
:CHIP
VSI2 SCL IIC CLK
0
R957
1.6
47 :CHIP
CLP DDCSDA DDC DATA
4.8 R958
4.4
47 :CHIP
LOCK ITA DDCSCL DDC CLK
5.0
5.0
HEATER PD4 PC1 HOST GND
R927
0
0.7
:CHIP
10 PD3 HFB IC904
C909 C910
PST9143NL
1000 0.1
14 :CHIP
RESET
10V :PT
VSO VDD
4.6 D917
C912
MA111
H-USYNC
HSO HSI1
NC VCC
4.7 11
C908
SUB
CSYNC CSI VSS
0.01
B:CHIP
D915 GND OUT
IC901
0.5
MA111
12 13
CXD9528S 4.8
CPU
H CENT
HV
H BLK
V-SYNC
H-SYNC
D916
MA111
bc10 bc11 bc12
• D - b BOARD WAVEFORMS
1 2
2.6 Vp-p (V) 0.3 Vp-p (V)
8 9
3.2 Vp-p (24NHz) 4.0 Vp-p (V)
10 11 12
STBY 5V
R903
1k :CHIP
RXD
TXD
R904
1k
:CHIP
D901
R917 R905
R916
15k MA111
15k R906 0
:CHIP :CHIP
:CHIP 10k
:CHIP
R921
0 :CHIP
D905
R912
D906 1SS119
1k :CHIP
MA111
R913
100
:CHIP
ICC DATA
R914
100
:CHIP
IIC CLK
R923
D908
D907 0 :CHIP
MA111
MA111
R918
1k
:CHIP
DDC CLK
D507
HZS5.1N
D910
HZU5.6B2TRF
D909
HZU5.6B2TRF
4 3 2 1
IC905
M24C08-MN6T
EEPROM
5 6 7 8
R901
4.1 4.7 5.0
JW(5)
C911
0.01
:PT
CBLANK
R935
100
:CHIP
R925
4.7k
R938
100
:CHIP R936
D911
100
100 MA111
:CHIP
16V
V FLY
CSYNC
BPCLAMP
D913
MA111
bc13 bc14
B-SS3483<U/C>-D..-P2-24
3
4 5
1.0 Vp-p (V) 0.7 Vp-p (H) 5.0 Vp-p (H)
0 !¡
!™
5.0 Vp-p (V) 5.0 Vp-p (H)
4.0 Vp-p (H)
5-10
13
D GND
1
+5V
2
3 RXD
4 TXD
CN901
4P
WHT
:S-MICRO
1 DDCSCL
2 DDCSDA TO A BOARD
3 HOST GND1 CN311
4 NC
5 IICDATA
6 GND
7 IICCLK TO A BOARD
8 HOST GND2 CN306
9 HRTRC
10 VRTRC
CN902
10P
WHT
:S-MICRO
CN903
8P
WHT
R924
:S-MICRO
100
:CHIP
1 CBLANK
2 INPUT SELECT
3 BPCLAMP
4 CSYNC
5 VSYNC
6 GND
7 HSYNC
R937
8 SYNC DET
100
:CHIP
TO A BOARD
CN309
6 7
5.0 Vp-p (H) 4.0 Vp-p (H)
!£ !¢
5.0 Vp-p (H) 4.6 Vp-p (H)