Philips 32PF9968/10 Service Manual page 128

EN 128 9. Q522.1E LA
9.6.4 Diagram B03C, TDA10023HT (IC7TA4)
Block Diagram
V
DDA1
XIN XOUT
1
2 3
PLL
5
SACLK
10
BASEBAND
IF ADC
CONVERSION
29
GPIO
32
CTRL
GPIO
TRELLIS
6
DEMODULATOR
TEST
16
CLRB
58
VIP
57
VIM
10
IICDIV
18
SDA
17
SCL
Pin Configuration
V
DDA1
XIN
XOUT
V
SSA1
SACLK
TEST
V
DDD3
V
SSD3
AGCTUN
IICDIV
AGCIF
SADDR
n.c.
V
DDD2
V
SSD2
CLRB
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Circuit Descriptions, Abbreviation List, and IC Data Sheets
V V V V
SSA1 DDD3 SSD3 DDD2
3 3 3
4 , 7 2 , 4 4 1 8, 25, 42 14, 30, 43
CLOCK
RECOVERY
DECIMATION TIMING
FILTERS INTERPOLATOR
DE-INTERLEAVER
DECODER
FRAME DE-
SYNC RANDOMIZER
TDA10023HT
I 2 C-BUS
INTERFACE
12
SADDR
1
2
3
4
5
6
7
8
TDA10023HT
9
10
11
12
13
14
15
16
Figure 9-10 Internal block diagram and pin configuration
V V V V
SSD2 DDD1 SSD1 DDA2
3
15, 31, 44 5 0 4 9 6 1
PWM
AGC
PWM
HALF CARRIER
EQUALIZER
NYQUIST RECOVERY
RS JQAM
DE-SCRAMBLER
FILTER
MPEG2
REED
DE-
TS
SOLOMON
INTERLEAVER
DECODER CKSUM
13, 51, 52, 53, 54, 56, 62, 63, 64
n.c.
V V V
DDA3 SSA3 DDD4
5 5 5 9 6 0
9
AGCTUN
11
AGCIF
DECISION
DIFFERENTIAL
DECODER
37 to 40,
45 to 48
8
DO[7:0]
36
DEN
OUTPUT
35
OCLK
INTERFACE
34
PSYNC
33
UNCOR
28
TDO
27
TMS
22
TCK
JTAG
23
TDI
26
TRST
21
ENSERI
19
SDAT
20
SCLT
001aac555
48 DO[0]
47 DO[1]
46
DO[2]
45
DO[3]
44
V
SSD2
43
V
DDD2
42
V
SSD3
41 V
DDD3
40 DO[4]
39 DO[5]
38 DO[6]
37 DO[7]
36 DEN
35 OCLK
34 PSYNC
33 UNCOR
H_17650_072.eps
programmable
interface
serial
interface
150108