Chrominance Demodulators; Demodulator Output Filters And Amplifiers; Vector Center Dot Position Clamp - Tektronix 1725 Instruction Manual

Chrominance
Demodulators
Demodulator Output
Filters and Amplifiers
Vector Center Dot Position
Clamp
1725 PAL/NTSC Vectorscope
similar to an NTSC display. This display evaluates relative differences between
the +V and –V lines, just as the signal is decoded in a PAL receiver. The
Microcontroller pulls the Preset input of U36A (a D-type flip-flop) high, which
allows the horizontal sync, clock pulses to toggle its outputs at a line rate. The
D input is controlled by another flip-flop, U36B (on Diagram 3), which has
identified the +V lines (for PAL) in the Subcarrier Regenerator.
The flip-flop outputs drive Q39 and Q40. A high output turns on the corre-
sponding transistor to shunt the signal at its collector to ground. This alternately
grounds and drives the + and – carrier inputs on the V Demodulator with
subcarrier to demodulate the –V lines 180° away from the +V lines.
The Chrominance Demodulators, U29 and U26, are double-balanced demodula-
tors, whose outputs are voltages proportional to the phase difference between the
signal input (pins 1 and 4) and the carrier input (pins 8 and 10). The signal
inputs are driven by chrominance from the Gain Cell (Diagram 1). The carrier
inputs are driven by a continuous sine wave, at subcarrier frequency, from the
Subcarrier Regenerator (Diagram 3). T1 is a balanced transformer driving an
LRC delay network, with L10 adjustment for PAL quad phase and C107
adjusted for NTSC quad phase. The V Axis Switching circuit, when operating,
determines which carrier input of the R–Y (V) Demodulator is driven by
subcarrier. When NTSC is selected U36A Preset input is forced low to turn on
Q39 and ground the + Carrier input.
The demodulator gains are set by the R–Y Gain (R277) and the B–Y Gain
(R263). The bias is controlled by the Center Dot Position Clamp circuits. R336
provides a small percentage of the Y signal into the X signal to be used as part of
the orthogonality adjustment.
A four-pole active lowpass filter (Q54 and Q52 for the R–Y (V) and Q53 and
Q58 for the B–Y (U)) removes the high frequency components of the demodula-
tion process. These filters determine the bandwidth of the vector mode signal
path to control the rise time and delay of the demodulated signal.
Q64, Q65, and Q66 (for the R–Y/V) and Q61, Q63, and Q67 (for the B–Y/U) are
inverting operational amplifiers with a gain of about 15. The amplifier outputs,
to drive the Deflection Amplifiers, are from high impedance emitter followers
Q64 (R–Y/V) and Q61 (B–Y/U).
The R–Y (V) Demodulator output is also fed back through R299 to a clamp
circuit consisting of U28 and Q51. U28 is an operational transconductance
amplifier used in a sample-and-hold circuit. The demodulated R–Y chrominance
drives the negative input (pin 2), while a voltage, controlled by the Vector
Vertical Position control (R258), is the reference level to the positive input
(pin 3).
Theory of Operation
4–15