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NAND FLASH MEMORY 8Gbit
+3.3V_Normal
IC102
K9F8G08U0M-PCB0
NC_1
NC_29
1
48
NC_2
SS-NAND
NC_28
2
47
NC_3
NC_27
3
46
NC_4
NC_26
4
45
NC_5
I/O7
5
44
OPT
Open Drain
NC_6
I/O6
0
R133
6
43
R/B
I/O5
NAND_RBb
7
42
RE
I/O4
NAND_REb
8
41
CE
NC_25
NAND_CEb
9
40
OPT
NC_7
NC_24
R149
0
10
39
NAND_CEb2
4700pF
NC_8
NC_23
C102
11
38
VCC_1
VCC_2
C101
12
37
0.1uF
VSS_1
VSS_2
13
36
NC_9
NC_22
14
35
NC_10
NC_21
15
34
CLE
NC_20
NAND_CLE
16
33
ALE
I/O3
NAND_ALE
17
32
WE
I/O2
NAND_WEb
18
31
WP
I/O1
+3.3V_Normal
Write Protection
19
30
NC_11
I/O0
- High : Normal Operation
20
29
- Low
: Write Protection
NC_12
NC_19
21
28
NC_13
NC_18
22
27
FLASH_WP
NC_14
NC_17
23
26
NC_15
NC_16
24
25
IC101
LGE35230(BCM35230KFSBG)
NON_BCM_CAP
B5
HDMI_CLK-
HDMI0_CLKN
TXOUT0_L0N
C5
HDMI_CLK+
HDMI0_CLKP
TXOUT0_L0P
TXOUT0_L1N
A4
HDMI_RX0-
HDMI0_D0N
TXOUT0_L1P
B4
HDMI_RX0+
HDMI0_D0P
TXOUT0_L2N
TXOUT0_L2P
A3
HDMI_RX1-
HDMI0_D1N
TXCLK_LN
B3
+3.3V_Normal
HDMI_RX1+
HDMI0_D1P
TXCLK_LP
TXOUT0_L3N
A2
HDMI_RX2-
HDMI0_D2N
TXOUT0_L3P
B2
R105
R104
R102
HDMI_RX2+
HDMI0_D2P
TXOUT0_L4N
4.7K
4.7K
4.7K
TXOUT0_L4P
W2
CEC
TXOUT0_U0N
V4
DDC0_SCL
TXOUT0_U0P
W4
DDC0_SDA
TXOUT0_U1N
TXOUT0_U1P
V3
HDMI0_HTPLG_IN
TXOUT0_U2N
+5V_MAIN
V2
HDMI0_HTPLG_OUT
TXOUT0_U2P
TXCLK_UN
D13
HDMI_ARC
HDMI0_ARC
TXCLK_UP
R101
E6
4.7K
HDMI0_RESREF
TXOUT0_U3N
TXOUT0_U3P
R106
3K
TXOUT0_U4N
TXOUT0_U4P
TXOUT1_L0N
TXOUT1_L0P
TXOUT1_L1N
TXOUT1_L1P
TXOUT1_L2N
TXOUT1_L2P
TXCLK1_LN
TXCLK1_LP
TXOUT1_L3N
TXOUT1_L3P
TXOUT1_L4N
TXOUT1_L4P
TXOUT1_U0N
TXOUT1_U0P
TXOUT1_U1N
TXOUT1_U1P
TXOUT1_U2N
TXOUT1_U2P
TXCLK1_UN
TXCLK1_UP
TXOUT1_U3N
TXOUT1_U3P
TXOUT1_U4N
TXOUT1_U4P
LT0VCAL_MONITOR
GPIO_BL_ON
BL_PWM/GPIO
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
IC102-*1
TC58DVG3S0ETA00
NC_1
NC_28
1
48
TOSIBA-NAND
NC_2
NC_27
2
47
NC_3
NC_26
3
46
NAND_DATA[0-7]
NC_4
NC_25
4
45
NC_5
I/O8
NAND_DATA[7]
5
44
NC_6
I/O7
NAND_DATA[6]
6
43
RY/BY
I/O6
NAND_DATA[5]
7
42
RE
I/O5
NAND_DATA[4]
8
41
CE
NC_24
9
40
OPT
NC_7
PSL
0
R148
10
39
+3.3V_Normal
NC_8
NC_23
11
38
+3.3V_Normal
VCC_1
VCC_2
12
37
VSS_1
VSS_2
C104
10uF
13
36
10V
NC_9
NC_22
14
35
C103
0.1uF
NC_10
NC_21
15
34
CLE
NC_20
16
33
ALE
I/O4
NAND_DATA[3]
17
32
WE
I/O3
NAND_DATA[2]
18
31
WP
I/O2
NAND_DATA[1]
19
30
NC_11
I/O1
NAND_DATA[0]
20
29
NC_12
NC_19
21
28
NC_13
NC_18
22
27
NC_14
NC_17
23
26
NC_15
NC_16
24
25
+3.3V_Normal
R198
10K
RGB_DDC_SDA
Q100
BSS83
C118
0.1uF
16V
AE27
TXA0N
AE28
TXA0P
AF27
TXA1N
AF28
TXA1P
AG27
+3.3V_Normal
TXA2N
AG28
TXA2P
AE26
TXACLKN
AF26
TXACLKP
R196
AH27
10K
RGB_DDC_SCL
TXA3N
AG26
TXA3P
AF25
TXA4N
AE25
TXA4P
Q101
BSS83
AH26
C119
TXB0N
0.1uF
AG25
TXB0P
16V
AE24
TXB1N
AD24
TXB1P
AH25
TXB2N
AF24
BBS CONNECT
TXB2P
AE23
TXBCLKN
AD23
TXBCLKP
AG24
TXB3N
AF23
+3.3V_Normal
TXB3P
DEBUG
AC22
TXB4N
P101
AD22
TXB4P
SDA0_3.3V
TJC2508-4A
SCL0_3.3V
AG23
VCC
SCL2_3.3V
AH23
1
C106
R110
R109
4.7uF
1.5K
1.5K
SDA2_3.3V
AE22
AE21
SCL
2
AF22
AH22
SDA
AG22
3
AF21
AG21
GND
5V_HDMI_1
4
AF20
5V_HDMI_2
AD21
AC21
5V_HDMI_3
5V_HDMI_4
AG20
AH20
R130
AD19
2K
AE19
AF19
FOR HDMI STANDARD
AH19
APPLY ONLY WHEN CONNECT TO PULL-UP GPIO
AE18
AD18
AG19
AF18
AG18
AF17
AC18
AH16
AG16
Boot ROM Device Select - (FA4,FAD7,FAD2,FAD1)
+3.3V_Normal
0000: ST Micro M25P or compatible Serial Flash
0010: 8-bit 512Mbit 512B page SLC NAND Flash devices
0100: 8-bit 128, 256Mbit 512B page SLC NAND Flash devices
0110: 8-bit 1Gbit 2KB page SLC NAND Flash devices
R113
R117
R122
R127
10K
10K
10K
10K
1000: 8-bit 2Gbit, 4Gbit, 8Gbit 2KB page SLC NAND Flash devices
OPT
OPT
1010: 8-bit 16Gbit, 32Gbit 4KB page SLC NAND Flash devices (O)
CI_ADDR[4]
0001: 8-bit 8/16/32Gbit 2KB page MLC NAND Flash devices
NAND_DATA[7]
0011: 8-bit 16/32Gbit 4KB page MLC NAND Flash devices
0101: 8-bit 32Gbit 8KB page MLC NAND Flash devices
NAND_DATA[2]
0111: 3B dual IO Serial Flash
NAND_DATA[1]
1001: BB dual IO Serial Flash
R114
R118
R123
R128
1011: fast Serail Flash > 50Mhz
10K
10K
10K
10K
1100: OneNAND Flash (always 16-bit)
OPT
OPT
1110: Reserved
1101, 1111: Reserved
NAND ECC (FA3, FA2, FALE)
R111
R115
R119
10K
10K
10K
000 = ECC disabled
OPT
OPT
CI_ADDR[3]
001 = ECC 1-bit repair
010 = ECC 4-bit BCH (O)
CI_ADDR[2]
011 = ECC 8-bit BCH, 27 byte spare
NAND_ALE
100 = ECC 12-bit BCH, 27 byte spare
101 = ECC 8-bit BCH, 16 byte spare
R112
R116
R120
10K
10K
10K
110, 111 = Reservedd
OPT
IC101
LGE35230(BCM35230KFSBG)
NON_BCM_CAP
AG6
TVM_XTALIN
54MHz_XTAL_P
AF6
TVM_XTALOUT
54MHz_XTAL_N
V5
LNB_INT
IRRXDA
AB4
FP_IN0
Y4
FP_IN1
AA4
SPARE_ADC1
Y5
SPARE_ADC2
AB2
FS_IN1
AB5
FS_IN2
U3
VGA_SDA
+3.3V_Normal
U2
VGA_SCL
Y2
R121
R126
R129
R131
BCM_RX
RDA
Y1
2.2K
2.2K
2K
2K
BCM_TX
TDA
33
AA3
R135
BSCDATAA
R136
33
AA2
BSCCLKA
R137
33
H3
RDB/GPIO
H2
R138
33
TDB/GPIO
H4
BSC_S_SCL
H5
BSC_S_SDA
OPT
OPT
OPT
OPT
+3.3V_Normal
C110
C109
C107
C108
33pF
33pF
33pF
33pF
F25
50V
R141
4.7K
50V
50V
50V
NMIB
W5
PCM_5V_CTL
POWER_CTRL
22 OPT
U5
R142
AON_HSYNC
U4
R143
22 OPT
AON_VSYNC
22 OPT
W3
R144
AON_GPIO_36
22 OPT
W1
R145
AON_GPIO_37
+3.3V_Normal
AB6
AON_RESETOUTB
Y6
R132
4.7K
TVM_BYPASS
OPT
R139
0
JRST
Y3
+3.3V_Normal
SOC_RESET
RESETB
G24
RESETOUTB
R124
1K
J6
TMODE
AVS_NDRIVE_1
OPT
W6
TESTEN
AVS_PDRIVE_1
+3.3V_Normal
R125
1K
F7
C111
0.01uF
VDAC_VREG
E7
C112
0.1uF
VDAC_RBIAS
R140
560
BCM REFRENCE is 562ohm
1%
Strap Setting
+3.3V_Normal
R154
R157
R160
R164
10K
10K
10K
10K
OPT
OPT
OPT
OPT
R155
R158
R161
R165
10K
10K
10K
10K
NAND_DATA[0]:
0: System is LITTLE endian (O)
1: System is BIG endian
CI_ADDR[7]:
0: Disable EDID automatic Downloading from Flash (O)
1: Enable EDID automatic Downloading from Flash
NAND_DATA[6] :
0: Disable OSC clock output on chip Pin (O)
1: Enable OSC clock output on chip pin.
CI_ADDR[6]:
0: Host MIPS run at 500 MHz (O)
1: Host MIPS run at 250 MHz
NAND_CLE:
0: Differential Oscillators TVM not bypassed (O)
1: Differential Oscillators TVM bypassed
NAND_DATA[4]:
0: 27MHz TVM Crystal Frequency
1: 54MHz TVM Crystal Frequency (O)
NAND_DATA[0-7]
AB1
NAND_DATA[7]
FAD_7
AB3
NAND_DATA[6]
FAD_6
AC1
NAND_DATA[5]
FAD_5
AC2
NAND_DATA[4]
FAD_4
AC3
NAND_DATA[3]
FAD_3
AD2
NAND_DATA[2]
FAD_2
AD3
NAND_DATA[1]
FAD_1
AE2
NAND_DATA[0]
FAD_0
AG1
FALE
NAND_ALE
AF1
FCEB_0
NAND_CEb
AC5
FCEB_1
NAND_CEb2
AE6
FCEB_2
/CI_CE1
AG5
FCEB_3
/CI_CE2
AF3
NFWPB
FLASH_WP
AG2
NAND_WEb
FWE
AE3
FRD
NAND_REb
AA5
/PCM_WAIT
FRDYB
AF2
CI_ADDR[2-14]
FA_0
NAND_CLE
AE1
FA_1
NAND_RBb
AC4
CI_ADDR[2]
FA_2
AD5
CI_ADDR[3]
FA_3
AD4
CI_ADDR[4]
FA_4
AE4
CI_ADDR[5]
FA_5
AE5
CI_ADDR[6]
FA_6
AD6
CI_ADDR[7]
FA_7
AH3
CI_ADDR[8]
FA_8
AF4
CI_ADDR[9]
FA_9
AH4
CI_ADDR[10]
FA_10
AG4
CI_ADDR[11]
FA_11
AF5
CI_ADDR[12]
FA_12
AG3
+3.3V_Normal
CI_ADDR[13]
FA_13
AH2
CI_ADDR[14]
FA_14
AH5
FA_15
R147
R150
R153
R156
R159
R162
R166
R146
10K
1K
1K
1K
1K
1K
1K
1K
STRAP_PCI
AD15
TRSTB
AF14
TDI/GPIO
AH14
TDO
AD14
TMS/GPIO
AG14
TCK/GPIO
AC16
DINT/GPIO
AH7
JRST
AVS_VFB
AG7
R163
AVS_VSENSE
1K
AD7
AVS_RESETB
AF7
AH8
C6
VDAC_1
D7
VDAC_2
R167
R170
R175
R177
R179
R181
R183
R187
R192
10K
10K
10K
10K
10K
10K
10K
10K
10K
OPT
OPT
OPT
OPT
OPT
OPT
NAND_DATA[0]
CI_ADDR[7]
NAND_DATA[6]
CI_ADDR[6]
NAND_CLE
NAND_DATA[4]
CI_ADDR[9]
CI_ADDR[11]
CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[8]
NAND_DATA[3]
NAND_DATA[5]
R168
R171
R176
R178
R180
R182
R184
R188
R193
10K
10K
10K
10K
10K
10K
10K
10K
10K
OPT
OPT
OPT
CI_ADDR[9],CI_ADDR[11],CI_ADDR[12],CI_ADDR[13]
TVM Crystal oscillator bias/gain control
0000: 210uA
0001: 390uA
0010: 570uA
0011: 730uA
0100: 890uA
(O)
0111: 1290uA
1000: 1416uA
1111: 2196uA
0101, 0110, 1001, 1010, 1011, 1100, 1101, 1110: Reserved
CI_ADDR[8]:
0: RESETOUTb (in On/Off only) stay asserted until software releases them.
1: Fix amount of delay for de-assertion on RESETOUTb (in On/IOff only)
at end of RESETb pulse (O)
NAND_DATA[3]:
0: MIPS will boot from external flash (O)
1: MIPS will boot from ROM
NAND_DATA[5]:
0: FLASH MODE
1: BSC_SLAVE(BBS) MODE (O)
NVRAM
FOR ATMEL_EEPROM
IC103-*1
AT24C256C-SSHL-T
A0
VCC
1
8
+3.3V_Normal
A1
WP
2
7
+3.3V_Normal
A2
SCL
3
6
GND
SDA
4
5
FOR ST_EEPROM
IC103
C116
0.1uF
M24M01-HRMN6TP
FOR ATMEL_EEPROM
R199 0
NC
VCC
1
8
Write Protection
R169 0
E1
WP
- Low
: Normal Operation
2
7
- High : Write Protection
A8'h
E2
SCL
R190
33
3
6
SCL3_3.3V
VSS
SDA
R191
33
4
5
SDA3_3.3V
C115
C117
8pF
8pF
OPT
OPT
54MHz X-TAL
SUNNY
C113
X101
12pF
54MHz
54MHz_XTAL_N
3
2
X-TAL_2
GND_1
R189
1M
4
1
OPT
GND_2
X-TAL_1
54MHz_XTAL_P
KDS
C114
X101-*1
12pF
54MHz
X-TAL_1
GND_2
1
4
GND_1
X-TAL_2
2
3
TP122
TP123
TP124
TP118
TP119
TP120
TP121
TP125
EAX64029301
1
MAIN & NAND FLASH
LGE Internal Use Only
19
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