Circuit Diagram - LG KP550 Service Manual

7. CIRCUIT DIAGRAM

BASE BAND PROCESSOR
VBAT VBAT
1 R 1 0
A B _ T D I
9 3 K 0
R _ F E T M P
* 2 M P : B C V s r e n o i
1 R 2 0
1 R 3 0
9 3 K 0
0 1 K 0
O L D A
1 R 4 0
0 1 K 0
A P L _ V E L E
I
X I
Q
Q X
X T O _ N A P
F 2 E
A P B _ N A D
F 1 E
B _ T W A E K P U
L N I P _ W M M _ A G
A P M _ O E D
L N I P _ W _ M R F Q
D R S
C L D B _ C A L K G I H _ T N E
J C A _ K E D E T T C
B _ T D L _ O N E
C H _ G N E
VBUS_OVP
1 R 5 0
. 9 K 1
R _ F N E
R _ F A D
1 R 6 0
F R C _ K L
1 K 0
P R W R O N
6 2 M Z H M _ C K L
I S _ M O I
S M I C _ K L
SD_1V8
S M I R _ T S
M M C C _ M D
* P B C V s r e n o i
M M C C _ K L
M M _ C 0 D
2 D V n o i 1 R 8 1 1 R 9 1
3 D s r e M M _ C 1 D
0 1 K 0 D I N M M _ C 2 D
H H V 1 1 . M M _ C 3 D
H L V 1 0 .
I V _ B N E
1 R 0 2 1 R 1 2
L H R v e B . _ W P
D I N 1 K 0
L L V 1 2 . U B S O _ n E
VIO_2V62
D T O
T I D
T M S
T K C
1 R 7 0 1 R 8 0
* o B t o o M e d T S R n T
T R K C
K 1 K 1
T I R _ G N I
T I R _ G N I
L r a e g B o l k c P U / K 1
S m l a B l o l k c P D / 1 K 0
R T C A S E N Y C
1 R 9 0 1 R 0 1
R T C A C E K L
P P I S E A T 2 T
D I N 1 K 0
P P I S E A T 1 T
P P I S E A T 0 T
TRACE32(14 Pin)
TRACE32(20 Pin)
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
CORE_1V35 SD_1V8 SD_1V8
W 8 1
M 0 _
V 7 1
M 1 _
Y 9 1
M 2 _
Y 8 1
M 3 _
W 7 1
M 4 _
A A 8 1
M 5 _
Y 7 1
M 6 _
W 6 1
M 7 _
A A 7 1
M 8 _
Y 6 1
M 9 _
U 5 1
_ M 0 1
K 6 1
A P O T U 1 1
M 2 1
A P O T U 2 1
N 5 1
B B I _
M 5 1
B _ B X I
M 6 1
B B Q _
K 5 1
B B Q _ X
E 3 1
T O _ U 0 T
B 4 1
T O _ U 1 T
F 1 1
T O _ U 2 T
A 5 1
T O _ U 3 T
E 1 1
T O _ U 4 T
F 2 1
T O _ U 5 T
B 3 1
T O _ U 6 T
C 1 1
T O _ U 7 T
E 2 1
T O _ U 8 T
C 2 1
T O _ U 9 T
B 2 1
T O _ T U 0 1
B 5 1
I _ T 0 N
C 3 1
I _ T 1 N
U100
PMB8877
EUSY0322801
D 7 1
R _ F T S 0 R
D 8 1
R _ F T S 1 R
E 5 1
R _ F A D A T
B 7 1
F R C _ K L
C 8 1
A C F
W 2 1
C K L O U 0 T
U 2 1
F 6 2 M
H 5 1
S I W _ F X T X R
H 6 1
C _ C O I
K 8 1
C C C _ K L
K 7 1
C C R _ T S
E 0 1
M M C 1 I C _ M D
A 2 1
M M C 1 I C _ K L
B 1 1
M M I C _ 1 A D 0 T
9 C
M M I C _ 1 A D 1 T
F 0 1
M M I C _ 1 A D 2 T
A 4 1
M M I C _ 1 A D 3 T
3 D
M M C 2 I C _ M D
2 D
M M I C _ 2 A D 0 T
6 F
M M C 2 I C _ K L
W 1 1
F W P
T 1 P 1 0
2 F
I D R _ A X T
2 G
I D R _ A X R
A 8 1
D T O
B 8 1
T I D
C 5 1
T M S
C 6 1
T K C
F 3 1
R T T S N _
F 6 1
T R K C
E 4 1
T I R _ G N I
B 6 1
M O 1 N
C 0 1
M O 2 N
A 7 A
R T C A S E N Y C
1 1
U
R T C A C E K L
9 Y
P P I S E A T 2 T
T 0 1
P P I S E A T 1 T
8 Y
P P I S E A T 0 T
1 C 8 2
1 C
3 p 9 3
VMME_2V9 RTC_2V11 VAUDB_2V5
VIO_2V62 VSIM_2V9 VPLL_1V35 VAUDA_2V5
8 U
M E _ M 0 A
W 4
M E _ M 1 A
8 T
M E _ M 2 A
6 U
M E _ M 3 A
W 5
M E _ M 4 A
A 4 A
M E _ M 5 A
7 T
M E _ M 6 A
7 U
M E _ M 7 A
5 Y
M E _ M 8 A
A 5 A
M E _ M 9 A
W 6
M E M A _ 0 1
9 T
M E M A _ 1 1
W 7
M E M A _ 2 1
6 Y
M E M A _ 3 1
9 U
M E M A _ 4 1
W 9
M E M A _ 5 1
1 V
M E M A _ 6 1
5 N
M E M A _ 7 1
2 U
M E M A _ 8 1
W 2
M E M A _ 9 1
5 R
M E M A _ 0 2
1 T
M E M A _ 1 2
4 R
M E M A _ 2 2
2 T
M E M A _ 3 2
5 P
M E M A _ 4 2
3 T
M E M A _ 5 2
4 T
M E M A _ 6 2
2 M
M E M A _ 0 D
3 L
M E M A _ 1 D
3 J
M E M A _ 2 D
5 L
M E M A _ 3 D
3 M
M E M A _ 4 D
1 N
M E M A _ 5 D
2 P
M E M A _ 6 D
2 N
M E M A _ 7 D
4 J
M E M A _ 8 D
4 K
M E M A _ 9 D
5 K
M E _ M D A 0 1
4 L
M E _ M D A 1 1
1 R
M E _ M D A 2 1
5 M
M E _ M D A 3 1
4 M
M E _ M D A 4 1
4 P
M E _ M D A 5 1
2 R
M E M C _ 0 S N _
3 P
M E M C _ 1 S N _
3 N
M E M C _ 2 S N _
4 N
M E M C _ 3 S N _
3 U
M E _ M S C 0 A N _
4 U
M E _ M S C 1 A N _
6 T
M E _ M S C 2 A N _
5 T
M E _ M S C 3 A N _
T 1 1
C F P D R _ N B
2 K
M E _ M W I A N T
1 M
M E _ M D A N V
1 L
M E _ M D R N
3 R
M E _ M W N R
W 3
M E M B _ C F K L 1 O
3 Y
M E M B _ C F K L 2 O
2 Y
M E _ M D S C K L O
A 2 A
M E M B _ 0 C N _
3 V
M E M B _ 1 C N _
5 U
M E M B _ 2 C N _
4 Y
M E M B _ 3 C N _
7 Y
M E M R _ S A N _
W 8
M E M C _ S A N _
U 0 1
M E M C _ E K
A A 6 1
3 F K 2
A A 5 1
O S 3 C K 2
W 4 1
R S E T E N _
H 8 1
S R O T T U N _
Y 4 1
R C T O _ T U
R 6 1 1 C 4 2
V E R P F
R 5 1
R I F E
J 8 1
S C P U R _ Q I _ 0 N
9 1
J
S C P U R _ Q I _ 1 N
H 7 1
S C P _ U C R O _ U 0 T
G 8 1
S C P U R _ Q I _ 2 N
1 C 6 2
. 0 u 1
VIO_2V62 VIO_2V62
9 2 1 C 0 3 1 C 1 3
p 9 3 p 9 3 p 9
- 121 -
ON BOARD ARM9 JTAG & ETM INTERFACE
SD_1V8
VIO_2V62
CN100
G1 G2
1 30
D A D 0 ( 2 : ) 6
D A D ) 0 ( 2 29
R T C A
D A D ) 1 ( 3 28
T A R E C
D A D ) 2 ( 4 27
T S R n T T A R E C
D A D ) 3 ( 5 26
T I D T A R E C
D A D ) 4 ( 6 25
T M S T A R E C
D A D ) 5 ( 7 24
T K C T A R E C
D A D ) 6 ( 8 23
T R K C T A R E C
D A D ) 7 ( 9 22
D T O T A R E C
D A D ) 8 ( 10 21
E T X S R n T T A R E C
D A D ) 9 ( 11 20
T I R _ G N I P P I S E
12 19
D A D 1 ( ) 0
P P I S E
13 18
D A D 1 ( ) 1
P P I S E
14 17
D A D 1 ( ) 2
R T C A
15 16
D A D 1 ( ) 3
D A D 1 ( ) 4
D A D 1 ( ) 5 G3 G4
D A D 1 ( ) 6 AXT430124
D A D 1 ( ) 7
ENBY0029001
D A D 1 ( ) 8
D A D 1 ( ) 9
D A D 2 ( ) 0
D A D 2 ( ) 1
D A D 2 ( ) 2
D A D 2 ( ) 3
D A D 2 ( ) 4
D A D 2 ( ) 5
D A D 2 ( ) 6
A D A T 0 ( 1 : ) 5
A D A T ) 0 (
A D A T ) 1 (
A D A T ) 2 (
A D A T ) 3 (
A D A T ) 4 (
A D A T ) 5 (
A D A T ) 6 (
A D A T ) 7 (
A D A T ) 8 (
A D A T ) 9 (
A D A T 1 ( ) 0
A D A T 1 ( ) 1
A D A T 1 ( ) 2
A D A T 1 ( ) 3
A D A T 1 ( ) 4
A D A T 1 ( ) 5
N _ N A _ D S C
_ A R _ M S C
T 1 P 0 0
D A D 2 ( ) 7
D A D 2 ( ) 8
D A D 2 ( ) 9
B 0 A
C F P D
B 1 A
_ D R
_ W R
D S L C I K
D S C K L O
B _ 0 C
B _ 1 C
D L Q S
U D Q S
R _ S A
C _ S A
C E K
3 . 2 6 7 K 8 z H
2 1
R _ S E T E
1 X 0 0
1 C 5 2 1 C 2 3
1 p 5 1 p 5
R C T O _ T U
2 2 n 0
V E R N F
1 R 1 1
2 K 2
VCHG VBUS_USB
HOLE UART1 J- TAG
VSUPPLY
3G 2.5G
1
GND GND
2
T _ P X R
RX RX U R A _ T
3
T _ P X T
TX TX U R A _ T
4
VCHAR NC1
5 T _ P P R O N
ON_SW ON_SW P R W R
6 P T V _ U S P P Y L
VBAT VBAT
7
PWR NC2
8
URXD NC3 U B S D _
9
UTXD NC4 S U _ B
10
DSR D R S
11 TP_GND
RTS
12
CTS
UART_TP
LGE Internal Use Only
C E K L
K P 7 T
K P 6 T
K P 5 T
K P 4 T
K P 3 T
K P 2 T
K P 1 T
K P 0 T
A T 2 T
A T 1 T
A T 0 T
S E N Y C
X R
X T
O _ N N E
M
P D