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B
MAIN BLOCK
Notes :
MP3/FM/IC REC
Signal Line.
Radio Signal Line.
CN2 (TO TUNER CIRCUIT CN1)
REC Signal Line.
1
2
3
4
5
6
7
8
9
10
11
12
Key
Control
IC10
Regulator
3.3V
24
23
22
21
20
19
18
17
16
15
14
13
USB PORT
U14 T17
USB_VBUS:
USB Supply detection line
usb 2.0 FS & usb 2.0
USB_DM:
Negative USB data line
usb 2.0 FS
USB_DP: Positive USB data line
usb 2.0 FS
USB_RPU: Soft connect output usb 2.0 FS
L17 DC_DC_PLAY
T18
DC_DC_VUSB:USB supply voltage
L7
N17
DC_DC_LX2:
Connection to DC/DC2 external coil
P17
DC_DC_LX1:
L10
Connection to DC/DC1 external coil
M17
DC_DC_VBAT:
Battery supply voltage
R18
DC/DC1 3.3V output voltage
DC/DC1 3.3V input voltage
M16
V10
Analog supply 10-bit ADC
A12
A12
MPMC_BLOUT0:
The signals nMPMCBLSOUT[0]
select byte lane [7:0] on the data bus.
Used for static memories.
A17
A17
MPMC_NOE:
Output enable for static memories.
Active LOW. Used for static
memory devices.
C9
C9
MPMC_NSTCS_0:
Static memory chip select 0.
Default active LOW. Used
for static memory device.
MPMC address 2
E18
E18
D16 MPMC address 3
D16
MPMC address 5
D18
A18
44
43
42
41
37
36
I/O
I/O
I/O
I/O
Vcc
Vss
4
7
6
5
IC2
FLASH MEMORY
N.C R/B
RE
CE
Vcc Vss
6
7
8
9
12
VDD
3.3V
15
CN3
3.3V
USB
CONTROL
U17
J17
F3
B3
T15
H15
LCD_RS: 'high' Data
register selsct 'low'
LCD_CSB: Chip Select
Instruction register select
LCD_E_RD: 6800 enable
6800 read/write select 8080 active "high" write enable
LCD_RW-WR:
HP_OUTCA: HEADPHONE common output reference
HP_OUTCB: HEADPHONE common output reference
IC3
C2HBZG000008
DSP IC
B14
A13
A1 A2
B2
A3
A4 B4 A5 B5
32
31
30
29
I/O
I/O
I/O
I/O
3
2
1
0
CLE ALE WE
WP
13
16
17
18
19
LCD Display
C2
C1 C3 D2 D1 D3 E2 E3 F2 G2
J1
8080 active "high" write enable
ADC_VINR: SADC Right Analog Input
T1
ADC_VINL: SADC Left Analog Input
T4
HP_OUTR: SDAC Right Headphone Output
P3
N2
N1
HP_OUTL: SDAC Left Headphone Output N3
XTALH_IN
T10
12 MHz clock input
XATLL_OUT
V9
12 MHz clock input
ADC_MIC:
R3
Microphone Input
G16
IC8
Regulator
LCD Light
Control
SV-MP120V BLOCK DIAGRAM
OPR LED
430.0mV P-P
12MHz
X2
MIC
DD
3.3V
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