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A BOARD SCHEMATIC DIAGRAM (15 OF 20)
1
A
RDQ0
[15]
RDQ0
E3
RDQ1
F7
[15]
RDQ1
RDQ2
[15]
RDQ2
F2
RDQ3
F8
[15]
RDQ3
RDQ4
[15]
RDQ4
H3
RDQ5
[15]
RDQ5
H8
RDQ6
G2
[15]
RDQ6
RDQ7
[15]
RDQ7
H7
RDQ8
D7
[15]
RDQ8
RDQ9
[15]
RDQ9
C3
RDQ10
[15]
RDQ10
C8
RDQ11
C2
[15]
RDQ11
RDQ12
[15]
RDQ12
A7
RDQ13
A2
B
[15]
RDQ13
RDQ14
B8
[15]
RDQ14
RDQ15
[15]
RDQ15
A3
B_A0
N3
B_A1
P7
B_A2
P3
B_A3
N2
B_A4
P8
B_A5
P2
B_A6
R8
B_A7
R2
B_A8
T8
B_A9
R3
C
B_A10
L7
B_A11
R7
B_A12
N7
B_BA0
M2
B_BA1
N8
B_BA2
M3
B_CS#
L2
B_CAS#
K3
B_RAS#
J3
D
B_WE#
L3
B_CKE
K9
RCLK0
J7
[15]
RCLK0
RCLK0#
K7
[15]
RCLK0#
RDQS1
C7
[15]
RDQS1
RDQS1#
B7
[15]
RDQS1#
RDQS0
F3
[15]
RDQS0
RDQS0#
G3
[15]
RDQS0#
E
RDQM1
D3
[15]
RDQM1
RDQM0
E7
[15]
RDQM0
B_ODT
K1
B_RST#
T2
F
G
H
1
Chassis RB1FK, BA
2
3
4
UD501
UD501
A1
DQL0
VDDQ_0
A8
DQL1
VDDQ_1
C1
DQL2
VDDQ_2
C9
DQL3
VDDQ_3
D2
DQL4
VDDQ_4
E9
DQL5
VDDQ_5
F1
DQL6
VDDQ_6
H2
DQL7
VDDQ#
H9
DQU0
VDDQ_8
DQU1
B2
DQU2
VDD_0
D9
DQU3
VDD_1
G7
DQU4
VDD_2
K2
DQU5
VDD_3
K8
DQU6
VDD_4
N1
DQU7
VDD_5
N9
VDD_6
R9
VDD_8
DDR_1.5V
R1
A0
VDD_7
A1
A2
J1
A3
NC_0
J9
A4
NC_1
L1
A5
NC_2
L9
A6
NC_3
M7
A7
NC_4
B_A13
T3
A8
NC_5
T7
A9
NC_6
A10/AP
A11
A_RVREF2
M8
A12
VREFCA
A_RVREF1
H1
VREFDQ
L8
BA0
ZQ
BA1
BA2
R5001
R5001
240_F
240_F
CS#
0402
0402
B1
CAS#
VSSQ_0
B9
RAS#
VSSQ_1
D1
WE#
VSSQ_2
D8
VSSQ_3
E2
VSSQ_4
E8
CKE
VSSQ_5
F9
CK
VSSQ_6
G1
CK#
VSSQ_7
G9
VSSQ_8
A9
DQSU
VSS_0
B3
DQSU#
VSS_1
E1
DQSL
VSS_2
G8
DQSL#
VSS_3
J2
VSS_4
J8
VSS_5
M1
DMU
VSS_6
M9
DML
VSS_7
P1
VSS_8
P9
VSS_9
T1
ODT
VSS_10
T9
RESET#
VSS_11
SDRAM_WBGA-96P_1GBIT
SDRAM_WBGA-96P_1GBIT
NT5CB64M16DP-CF
NT5CB64M16DP-CF
DDR_1.5V
C5035
C5035
R5002
R5002
R5003
R5003
0.1U_16V_K
0.1U_16V_K
0402_X7R
0402_X7R
1K_F
1K_F
1K_F
1K_F
A_RVREF1
A_RVREF2
R5009
R5009
C5003
C5003
R5010
R5010
0.1U_16V_K
0.1U_16V_K
1K_F
1K_F
0402_X7R
0402_X7R
1K_F
1K_F
TP5001
TP5001
L5001
L5001
120R-100MHZ_0805
120R-100MHZ_0805
DDR_1.5V
[6,7,15]
PWM_1.5V
C5007
C5007
C5037
C5037
C5036
C5036
0.1U_16V_K
0.1U_16V_K
0.1U_25V_K
0.1U_25V_K
180P_50V_J
180P_50V_J
0402_X7R
0402_X7R
0603_X7R
0603_X7R
0402_NPO
0402_NPO
Place near power plane via
Decoupling caps for the memory UD501 VDDR pins
2
3
4
5
6
Damping for DDR ADDR/CMD
0402_8P4R
0402_8P4R
RP501
RP501
100
100
1_WE#
[15]
1_WE#
1
8
1_CAS#
2
7
[15]
1_CAS#
1_RAS#
3
6
[15]
1_RAS#
1_A12
4
5
[15]
1_A12
1_ODT
R5005
R5005
100_J
100_J
1
2
[15]
1_ODT
1_CS#
R5006
R5006
100_J
100_J
1
2
[15]
1_CS#
1_BA0
R5007
R5007
100_J
100_J
1
2
[15]
1_BA0
1_BA2
R5008
R5008
100_J
100_J
1
2
[15]
1_BA2
RP503
RP503
0402_8P4R
0402_8P4R
100
100
1_RST#
1
8
[15]
1_RST#
1_A9
2
7
[15]
1_A9
1_A13
3
6
[15]
1_A13
1_A0
4
5
[15]
1_A0
100
100
0402_8P4R
0402_8P4R
RP504
RP504
1_A3
1
8
[15]
1_A3
1_A5
2
7
[15]
1_A5
1_A2
3
6
[15]
1_A2
1_A7
4
5
[15]
1_A7
RP505
RP505
100
100
0402_8P4R
0402_8P4R
1_A4
1
8
[15]
1_A4
1_BA1
2
7
[15]
1_BA1
1_A10
[15]
1_A10
3
6
1_CKE
4
5
[15]
1_CKE
RP506
RP506
100
100
0402_8P4R
0402_8P4R
1_A11
[15]
1_A11
1
8
1_A8
2
7
[15]
1_A8
1_A6
3
6
[15]
1_A6
1_A1
4
5
[15]
1_A1
C5001
C5001
0.1U_16V_K
0.1U_16V_K
0402_X7R
0402_X7R
C5004
C5004
0.1U_16V_K
0.1U_16V_K
0402_X7R
0402_X7R
C5008
C5008
C5009
C5009
C5010
C5010
C5011
C5011
C5012
C5012
C5013
C5013
C5014
C5014
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0.1U_16V_K
0402_X7R
0402_X7R
0402_X7R
0402_X7R
0402_X7R
0402_X7R
0402_X7R
0402_X7R
0402_X7R
0402_X7R
0402_X7R
0402_X7R
0402_X7R
0402_X7R
5
6
7
8
B_WE#
B_CAS#
B_RAS#
B_A12
B_ODT
DDR CHANGE LIST
B_CS#
1. Delete RP502 100R.
B_BA0
2. Add R5005,R5006,R5007,R5008 100R/0402.
B_BA2
B_RST#
B_A9
B_A13
B_A0
B_A3
B_A5
B_A2
B_A7
B_A4
B_BA1
B_A10
B_CKE
B_A11
B_A8
B_A6
B_A1
Damping and Termination for CLK
Close to Mainchip
Close to DRAM
RCLK0
RCLK0
R5004
R5004
100_J
100_J
RCLK0#
RCLK0#
GND
GND
[5,6,7,8,9,10,11,12,13,14,15,17,18,19,20,21]
C5015
C5015
22U_6.3V_M
22U_6.3V_M
0805_X5R
0805_X5R
Title
Title
Title
DDR
DDR
DDR
i S
i S
i S
e z
e z
e z
D
D
D
o
o
o
u c
u c
u c
m
m
m
e
e
e
t n
t n
t n
N
N
N
u
u
u
m
m
m
b
b
b
r e
r e
r e
A3
A3
A3
FY13 BA_MT5389
FY13 BA_MT5389
FY13 BA_MT5389
D
D
D
t a
t a
t a
: e
: e
: e
Thursday, December 20, 2012
Thursday, December 20, 2012
Thursday, December 20, 2012
S
S
S
h
h
h
e
e
e
t e
t e
t e
16
16
16
of
of
of
21
21
21
7
8
Chassis RB1FK, BA
A
B
C
D
E
F
G
H
R
R
R
v e
v e
v e
A
A
A
25
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