Vega ARIES v3.0 Product Reference Manual
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Vega ARIES v3.0 Product Reference Manual

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Product Reference Manual
Description
The ARIES v3.0 is a fully indigenous and a "Made in India" product to get started with basic
microprocessor programming and embedded systems. This board is built upon a RISC-V ISA compliant VEGA
Processor with easy-to-use hardware and software. The VEGA SDK also provides full ecosystem with
numerous examples and support documentation. This board is designed and developed by Centre for
Development of Advanced Computing (C-DAC) as part of the Digital India RISC-V (DIR-V) Program, by the
Ministry of Electronics and Information Technology, Government of India.
Target areas/Applications
Low power IoT, Sensor fusion, Smart Meter, System supervisors, Remote sensors, Wearable devices,
Toy and electronic education equipment, Legacy 8/16-bit applications, Industrial networking and many
more...
© March, 2023 Centre for Development of Advanced Computing (C-DAC)
ARIES v3.0
Page | 1/12

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Summary of Contents for Vega ARIES v3.0

  • Page 1 Product Reference Manual Description The ARIES v3.0 is a fully indigenous and a “Made in India” product to get started with basic microprocessor programming and embedded systems. This board is built upon a RISC-V ISA compliant VEGA Processor with easy-to-use hardware and software. The VEGA SDK also provides full ecosystem with numerous examples and support documentation.
  • Page 2 ARIES v3.0 Features Controller THEJAS32 SoC with VEGA ET1031 Microprocessor Memory 2MB Flash 256KB SRAM Peripherals PWM Pins : 8 nos • Analog Input Pins : 4 nos • : 3 nos • UART : 3 nos • : 2 nos •...

  • Page 3: Table Of Contents

    ARIES v3.0 CONTENTS 1. The Board 2. Ratings 2.1 Recommended Operating Conditions 2.2 Power Consumption 3. Functional Overview 3.1 Board Topology 3.2 Processor 3.3 THEJAS32 pinout 3.4 Power Tree 4. Board Operation 4.1 Getting Started 5. Connector Pinouts 5.1 Board Outline & Mounting Holes 6.

  • Page 4: The Board

    ARIES v3.0 1. The Board ARIES v3.0 is a development platform based on THEAJS32 ASIC which operates at a frequency .0 is a development platform based on THEAJS32 ASIC which operates at a frequency .0 is a development platform based on THEAJS32 ASIC which operates at a frequency of 100MHz.

  • Page 5: Processor

    1.2V Regulator 3.2 Processor The main controller is THEAJS32 SoC which operates at a frequency of 100MHz. It includes VEGA ET1031 Microprocessor, 256KB internal SRAM, Three UARTs, Four SPIs, Three TIMERs, Eight PWMs, Three I2C interface, 32 GPIOs. Most of its pins are connected to the external headers, however some are reserved for internal communication.
  • Page 6 ARIES v3.0 TSTMODE Test mode select. Connect to GND through a 1K resistor. IIC2SDA I2C 2 Serial Data. IIC2SCL I2C 2 Serial Clock. IIC0SCL I2C 0 Serial Clock. IIC0SDA I2C 0 Serial Data. PVSSC14 Ground reference for logic. PVDDC14 Positive supply for logic. Connect to 1.2V supply.
  • Page 7 ARIES v3.0 PVSSC7 Ground reference for logic. PVDDC7 Positive supply for logic. Connect to 1.2V supply. PWM(4) Pulse Width Modulation. PWM(3) Pulse Width Modulation. PWM(2) Pulse Width Modulation. PVDDIO8 IO Power Supply VDD pin. PVSSIOC8 Ground reference for IO pins.

  • Page 8: Power Tree

    VCC_1.2V Thejas32 SoC FTDI SPI Flash LEDs 4. Board Operation 4.1 Getting Started To use Vega Arduino IDE for programming follow the steps given in the link below • For Linux; https://bit.ly/vega-linux • For Windows; https://bit.ly/vega-windows To use Eclipse IDE for programming follow the steps given in the link below •...

  • Page 9: Connector Pinouts

    ARIES v3.0 Connector Pinout © March, 2023 Centre for Development of Advanced Computing (C-DAC) Page | 9/12...
  • Page 10 ARIES v3.0 SPECIFICATIONS THEJAS 32 ARIES BOARD REMARKS SPI0_SS J1_8 SPI0_SCLK J1_5 Connected to HEADER J1 SPI0_MISO J1_6 SPI0_MOSI J1_7 SPI1_SS J7_6 SPI1_SCLK J7_4 Connected to HEADER J7 SPI1_MISO J7_2 SPI1_MOSI J7_3 SPI (4) SPI2_SS J4_6 SPI2_SCLK J4_4 Connected to HEADER J4...
  • Page 11 ARIES v3.0 GPIO6 J2_10 GPIO7 J2_8 GPIO8 J2_6 GPIO9 J2_4 GPIO10 J2_2 GPIO11 J3_8 GPIO12 J3_7 GPIO13 J3_6 Connected to HEADER J3 GPIO14 J3_5 GPIO15 J3_4 GPIO16 J10_11 GPIO17 J10_9 GPIO18 J10_7 Connected to HEADER J10 GPIO19 J10_5 GPIO20 J10_3...

  • Page 12: Board Outline & Mounting Holes

    ARIES v3.0 5.1 Board Outline & Mounting Holes Board Outline & Mounting Holes ( Dimensions in mm[ Dimensions in mm[mil] ) 6. Company Information Company name C-DAC Hardware Design Group Hardware Design Group Centre for Development of Advanced Computing (...

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