Atmel QTouch AT42QT1040 Operations

Atmel QTouch AT42QT1040 Operations

4-key sensor ic

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Features
Number of Keys:
– Up to 4
Discrete Outputs:
– 4 discrete outputs indicating individual key touch
Technology:
– Patented spread-spectrum charge-transfer (direct mode)
Electrode Design:
– Simple self-capacitance style (refer to the Touch Sensors Design Guide)
Electrode Materials:
– Etched copper, silver, carbon, Indium Tin Oxide (ITO)
Electrode Substrates:
– PCB, FPCB, plastic films, glass
Panel Materials:
– Plastic, glass, composites, painted surfaces (low particle density metallic paints
possible)
Panel Thickness:
– Up to 10 mm glass, 5 mm plastic (electrode size dependent)
Key Sensitivity:
– Fixed key threshold, sensitivity adjusted via sample capacitor value
Adjacent Key Suppression
– Patented Adjacent Key Suppression
detection
Interface:
– Pin-per-key outputs, plus debug mode to observe sensor signals
Moisture Tolerance:
– Good
Power:
– 1.8V ~ 5.5V
Package:
– 20-pin 3 x 3 mm VQFN RoHS compliant
Signal Processing:
– Self-calibration, auto drift compensation, noise filtering, Adjacent Key
Suppression technology
Applications:
– Mobile, consumer, white goods, toys, kiosks, POS, and so on
(AKS
) technology to enable accurate key
Downloaded From
Oneyac.com
QTouch
4-key
Sensor IC
AT42QT1040
9524B–AT42–04/09

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Summary of Contents for Atmel QTouch AT42QT1040

  • Page 1 Features • Number of Keys: – Up to 4 • Discrete Outputs: – 4 discrete outputs indicating individual key touch • Technology: – Patented spread-spectrum charge-transfer (direct mode) • Electrode Design: – Simple self-capacitance style (refer to the Touch Sensors Design Guide) ™...
  • Page 2: Pinout Configuration

    1. Pinout and Schematic Pinout Configuration SNSK3 SNS2 OUT2 SNSK1 QT1040 OUT3 SNS1 OUT1 SNSK0 OUT0 SNS0 Table 1-1. Pin Listing Name Type Function Notes If Unused... SNS2 Sense pin To Cs2 Leave open Sense pin and SNSK1 To Cs1 and option resistor + key Connect to option resistor* option detect SNS1...
  • Page 3 AT42QT1040 Schematic Figure 1-1. Typical Circuit NOTES: 1) The central pad on the underside of the VQFN chip is a Vss pin and should be connected VUNREG VREG to ground. Do not put any other tracks underneath the body of the chip. 2) It is important to place all Cs and Rs components physically near to the chip.
  • Page 4: Signal Processing

    2.2.4 Adjacent Key Suppression Technology The device includes Atmel’s patented Adjacent Key Suppression (AKS) technology, to allow the use of tightly spaced keys on a keypad with no loss of selectability by the user. There is one global AKS group, implemented so that only one key in the group may be reported as being touched at any one time.
  • Page 5 AT42QT1040 The use of AKS is selected by connecting a 1 M resisitor between Vdd and the SNSK0 pin (see Section 4.1 on page 8 for more information). When AKS is disabled, any combinations of keys can enter detect. 2.2.5 Auto Drift Compensation Signal drift can occur because of changes in Cx and Cs over time.
  • Page 6 ™ Application Note QTAN0002, Secrets of a Successful QTouch Design, and the Touch Sensors Design Guide, both downloadable from the Touch Technology area of Atmel’s website, www.atmel.com. LED Traces and Other Switching Signals For advice on LEDs and nearby traces, refer to Application Note QTAN0002, Secrets of a ™...
  • Page 7: Power Supply

    AT42QT1040 Power Supply Section 5.2 on page 13 for the power supply range. If the power supply fluctuates slowly with temperature, the device tracks and compensates for these changes automatically with only minor changes in sensitivity. If the supply voltage drifts or shifts quickly, the drift compensation mechanism is not able to keep up, causing sensitivity anomalies or false detections.
  • Page 8: Detailed Operations

    4. Detailed Operations Adjacent Key Suppression The use of AKS is selected by the connection of a 1 M resistor (RAKS resistor) between the SNSK0 pin and either Vdd (AKS mode on) or Vss (AKS mode off). Table 4-1. RAKS Resistor RAKS Connected To...
  • Page 9: Speed Selection

    AT42QT1040 Figure 4-1. ~500 ns Pulse On OUT2 Pin SNS0K OUT2 Power-on/ ~20 ms Pulse on OUT2 Reset SNS0K OUT2 Speed Selection Speed selection is determined by a 1 M resistor (RFS resistor) connected between SNSK1 and either Vdd (Fast Mode) or Vss (Slow Mode). Table 4-2.
  • Page 10: Debug Mode

    Calibration Calibration is the process by which the sensor chip assesses the background capacitance on each channel. During calibration, a number of samples are taken in quick succession to get a baseline for the channel’s reference value. Calibration takes place ~50 ms after power is applied to the device. Calibration also occurs if the Max On-duration is exceeded or a positive re-calibration occurs.
  • Page 11 AT42QT1040 Table 4-3. Serial Data Output (Continued) Byte Purpose Notes Delta 0 Low Byte Signed 16-bit integer Delta 0 High Byte Delta 1 Low Byte Signed 16-bit integer Delta 1 High Byte Delta 2 Low Byte Signed 16-bit integer Delta 2 High Byte Delta 3 Low Byte Signed 16-bit integer Delta 3 High Byte...
  • Page 12 Figure 4-3. Byte Following Byte (~ 30 µs Period) Figure 4-4. Full Debug Send (30 Bytes) Figure 4-5. Debug Lines Floating Between Debug Data Sends (30 Bytes, ~2 ms to Send) AT42QT1040 9524B–AT42–04/09 Downloaded From Oneyac.com...
  • Page 13: Specifications

    AT42QT1040 5. Specifications Absolute Maximum Specifications -0.5 to +6.0V Max continuous pin current, any control or drive pin ±10 mA Voltage forced onto any pin -0.5V to (Vdd + 0.5) Volts CAUTION: Stresses beyond those listed under Absolute Maximum Specifications may cause permanent damage to the device.
  • Page 14: Timing Specifications

    Timing Specifications Parameter Description Units Notes Burst duration – – Cx = 5 pF, Cs = 18 nF Burst center frequency – Burst modulation, percentage -7.5 – +7.5 Burst pulse width – – µs Power Consumption Vdd (V) AKS Mode (RAKS) Speed (RFS) Power Consumption (µA) Slow...
  • Page 15: Mechanical Dimensions

    REV. 20M2, 20-pad, 3 x 3 x 0.85 mm Body, Lead Pitch 0.45 mm, Package Drawing Contact: 20M2 1.55 x 1.55 mm Exposed Pad, Thermally Enhanced packagedrawings@atmel.com Plastic Very Thin Quad Flat No Lead Package (VQFN) 9524B–AT42–04/09 Downloaded From Oneyac.com...
  • Page 16 Marking Either of the following two markings may be used: Abbreviation of Pin 1 ID Part Number: AT42QT Code Revision: 1.0 Released Program Week Code Number 1-52 Where: A = 1 B = 2 ... Z = 26 then using the underscore A = 27...Z = 52 Pin 1 ID Abbreviation of Part Number:...
  • Page 17: Moisture Sensitivity Level (Msl)

    AT42QT1040 Part Number Part Number Description AT42QT1040-MMH 20-pin 3 x 3 mm VQFN RoHS compliant Moisture Sensitivity Level (MSL) MSL Rating Peak Body Temperature Specifications MSL1 IPC/JEDEC J-STD-020 Revision History Revision No. History  Revision A – March 2009 Initial release for chip revision 1.0 ...
  • Page 18 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR...
  • Page 19 单击下面可查看定价,库存,交付和生命周期等信息 >>Microchip Technology Downloaded From Oneyac.com...

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