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STV0360
LC-26GA5E
LC-32GD9E
LC-32GA5E
LC-37GD9E
3.2
Pinout description (preliminary)
2.5.2. Pin Description
Table 1: STV0360 pin description
Pin number
Clock and resets
12
62
63
61
64
Analog interface
2
5
6
3
9
10
4, 11
1
7
8
2
I
C interface
21
20
19
18
MPEG interface
25, 26, 27, 29,
31, 32, 33, 34
36
23
38
40
51
50
49
48
Name
Type
1
RESET
I
XTALI
Analog
XTALO
Analog
VCCXTAL1.8
Supply
GNDXTAL
Ground
DVCCA1.8
Supply
REFM
Analog
REFP
Analog
VCCA1.8
Supply
INM
Analog
INP
Analog
GNDA
Supply
DGNDA
Ground
VR
Analog
VCCA3.3
Supply
2
SDA
IO
SCL
I
SDAT
IO
SCLT
I
D7/0
3
O
CLK_OUT
O
STR_OUT
O
D/P
O
ERROR
O
HFEC0
O
CCLK/HFEC1
O
CDATA/HFEC2
O
CIQ/HFEC3
O
Description
Hardware reset, active low
Crystal oscillator input/external clock (1.8 V)
Crystal oscillator output
Analog oscillator supply (1.8 V)
Analog oscillator ground
Analog part digital supply (1.8 V)
Internal negative reference
Internal positive reference
Analog supply (1.8 V)
Negative analog input
Positive analog input
Analog ground
Analog ground
Reference
Analog supply (3.3 V)
Serial data (open drain)
Serial clock (open drain)
SDA tuner (open drain)
SCL tuner
Serial D7, MPEG data
MPEG byte or bit clock
MPEG first byte sync
MPEG data valid/parity
MPEG packet error
Hierarchical FEC output bit 0
Hierarchical FEC output bit 1 or clock for
constellation display
Hierarchical FEC output bit 2 or data for
constellation display
Hierarchical FEC output bit 3 or IQ validation for
constellation display
7283434C
STMicroelectronics Confidential
84
Pin information
Drive (mA)
-
-
-
-
-
-
-
-
-
-
-
-
-
8
-
4
8/4
4
2
4
2
2
2
2
2
7/66
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