Advertisement
A5
G
R3365
100
F
PS3301
GND (DNR)
1
VV C OUT
2
GND (DNR)
3
VV Y OUT
4
REG 12V
5
EE
L
6
E
PS3302
TBC MODE 0
1
A4
Y/C C OUT
2
ADV
3
B1
HEAD SW
4
A3
GND (DNR)
5
SEP IN
6
7
8
GND (DNR)
9
D
SEP C OUT
10
GND (DNR)
11
SEP Y OUT
12
GND (DNR)
13
REG 3.3V
14
FSC
15
B3
DIGITAL 5V
16
MAIN IIC DATA
17
A2
MAIN IIC CLOCK
18
A1
C
R3364
100
B
A
B4
B5
B6
NOTE:THE MEASUREMENT MODE OF THE DC VOLTAGE IN THE BRACKETS( )ON THIS DIAGRAM IS RECORD MODE
WITH PAL COLOUR SIGNAL.(SP MODE)
1
2
VIDEO MAIN SIGNAL PATH IN REC MODE
L3304
22u
11.8
R3334
C3352
C3337
680
0.1
16V47
Q3313
2SB1218A
11.1
(INV.)
Q3314
C3346
2.2
2.8
2SD1819A
8P
(AMP)
1.6
2.1
R3333
R3332
L3307
620
1K
27u
1.5
R3335
C3347
C3345
R3331
560
12P
12P
910
R3363
L3312
C3372
68
39u
30P
QR3301
DTC363EK
(PB:ON)
R3327
C3343
1200
8P
5.1
R3329
L3306
C3341
750
27u
0.1
2.8
C3344
C3342
R3328
12P
12P
1200
2.2
C3349
C3348
0.1
6V47
L3308
22u
5.1
R3322
R3339
1K
2200
Q3310
Q3307
3.4
2SD1819A
2SD1819A
(AMP)
(AMP)
2.8
3.4
C3362
L3305
Q3308
0.1
22u
(B)
2.3
2SD1819A
(AMP)
R3321
C3340
1.7
1800
27P
R3317
C3355
220
0.01
R3325
R3324
R3323
820
470
1K
11.8
11.8
R3312
2K
Q3303
Q3304
5.9
11.1
2SD1819A
2SB1218A
(AMP)
(INV.)
R3313
Q3301
C3354
5.3
1500
4.1
3P
2SD1819A
(AMP)
2.7
R3314
L3301
R3310
R3316
2200
Q3302
27u
1K
620
2.1
2SB1218A
(AMP)
R3311
C3334
C3333
1K
8P
12P
(B)
B7
THE MEASUREMENT MODE OF THE DC VOLTAGE OUT OF THE BRACKETS ON THIS DIAGRAM IS PLAYBACK MODE
WITH PAL COLOUR SIGNAL.(SP MODE)
3
4
VIDEO MAIN SIGNAL PATH PLAYBACK MODE
LB3305
VLP0157
R3330
C3310
4700
6V47
LB3304
LB3306
VLP0157
VLP0157
C3323
LB3308
6V47
Q3312
VLP0157
2SB1218A
(AMP)
C3327
0.01
LB3303
VLP0157
C3326
0.01
C3321
6V47
80
R3305
C3325
22K
1
1.1
YC IN
81
PED.
82
VSS YAD
C3324
CLAMP
1
1.1
Y IN
83
Q3311
2.5
2SD1819A
84
VDD YAD
(AMP)
C3318 0.01
0.8
C3322
85
VRB YAD
0.1
C3317 0.01
0.8
86
VRB CAD
2.5
87
VDD CAD
C3316
0.01
1.2
C IN
88
R3326
C3320
89
VSS CAD
1K
0.1
C3315 0.01
BIAS
1.7
90
VRT CAD
C3319
91
A VSS1
0.1
5.1
2.5
92
VDD YCDA
1.7
1.7
C OUT
D/A
93
8FSC
1.1
94
VSS YCDA
R3320
1.5
Y OUT
D/A
1K
95
8FSC
C3314 0.01
1.2
96
BIAS DA2
C3338
R3319
C3313 0.01
12P
820
0.8
97
BIAS DA1
C3312 0.01
0.9
98
VREF DA
99
A VSS2
2.5
100
VDD PLL
IC3301
R3309
R3340
1
330
4700
TC90A88F
(3D Y/C SEP.&
3D NR TBC)
11.1
2.1
C3311
C3309
2.1
0.1
0.1
Q3315
1.5
1.5
2SB1218A
(AMP)
R3315
200
5
6
A2
A1
IC3303
PQ1K253M2ZP
(2.5V REG.)
3.4
2.5
LB3309
LB3310
1
VIN
VOUT
6
VLP0157
VLP0157
C3350
16V10
2
GND
GND
5
3.4
1.3
3
VC
NR
4
C3351
0.01
C3332
6V47
R3306
C3331
C3328
0
0.1
0.1
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
REC
A/D
4FSC
PB
3D
MEMORY
Y/C
SEP.
A/D
DECODER
4FSC
UP
ENCODER
EQ
SAMPLING
(BURST CHANGE)
+
BLACK
UP
DELAY
EQ
EXPANSION
SAMPLING
ADJ.
YNC
(SYNC
CHANGE)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
C3307
C3306
0.1
0.1
L3313
C3308
R3303
33u
1500P
0
C3371
R3318
39P
4700
B3
B8
7
8
9
A4
IC3302
R3112N251A
(RESET)
LB3307
VLP0157
3.4
2.1
1
OUT
CD
5
R3307
C3330
R3301
10K
8200P
15K
3.4
2
VDD
3
GND
4
C3353
R3302
6V47
33K
C3329
C3303
0.1
0.1
61
60
59
58
57
56
55
54
53
52
51
2.5
VDD RAM2
50
TBC WE
3.3
DELAY
49
ADJ.
HSW IN
2.4
48
SYNC
TBC
TIMING
PV IN
CONTROL
47
ADV OUT
0.1
46
D VSS2
45
3D
0
OSD CK
44
DNR
2.5
D VDD2
43
TEST 3
42
C3302
0.1
TEST 2
41
TEST 1
40
REC
VSS IO2
39
CNR
0
HD OUT
38
PB
0
VD OUT
37
REC
YNR
3.4
VDD IO2
36
LNR
PB
OSD A2
35
C3301
0.1
OSD A1
34
OSD B
33
OSD G
32
OSD R
31
20
21
22
23
24
25
26
27
28
29
30
C3305
0.1
B9
NV-HS880EG/B/EC/EE
TBC/DNR PACK SCHEMATIC DIAGRAM
10
11
A5
A3
LB3311
VLP0157
LB3301
VLP0157
R3308
10K
B1
Advertisement
