The 8254-2 timer/counter is treated by system programs as an arran-
gement of four programmable external I/O ports. Three are treated as
counters; the fourth is a control register for mode programming.
System interrupts
Si
xteen levels of system interrupts are provided by the 80386SX NMI
d two
interrupt controller chips. The following shows the
an
8259A
in terrupt-level assignments' decreasing priority:
T able 6-4: Interrupt Level Assignment
Chapter 6: Appendix
19