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This document contains information highly confidential to Shenzhen G&T Industrial Development Co., Ltd (Fibocom). Fibocom offers this information as a service to its customers, to support application and engineering efforts that use the products designed by Fibocom. The information provided is based upon requirements specifically provided to Fibocom by the customers.
Preface ............................... 4 Manual Scope ............................. 4 Target Audience ..........................4 How to use this Manual ........................4 Hardware Description .......................... 5 Functional Overview ......................5 Naming rule of Part Number ....................5 Block Diagram ........................6 Design-In ............................. 6 Power Management ......................
Preface Manual Scope This Manual provides hardware design instructions and information on how to set up production and final product tests. Target Audience This manual is intended for hardware developers who communicate with the GTS-4E module. How to use this Manual This manual has a modular structure.
Hardware Description Functional Overview The GTS-4E designed by FIBOCOM basing on the SIRF-IV is a new generation of GPS receiving module, and also in price competitive advantage. It’s a new 48-channel ultra-high sensitive GPS receiving module. Based on new highly integrated SIRF-IV chips and meticulously integration key parts...
Block Diagram Figure 1: Hardware Block Schematic Design-In Power Management 2.1.1 Connecting Power GTS-4E receivers have two power supply pins: VCC, V_BCKP. 2.1.1.1 VCC - Main Power The main power supply is fed through the VCC pin. During operation, the current drawn by the GTS-4E GPS module.
1. Backup Battery 2. Directly Connect to or by switcher to VCC - Main Power 3. GPIO In case of a power failure on pin VCC, the real-time clock and backup RAM are supplied through pin V_BACK.This enables the GTS-4E receiver to recover from a VCC - Main power failure with either a Hotstart or a Warmstart(depending on the duration of VCC outage) and to maintain the configuration settings.
ID151 & 167. Adaptive TricklePower (ATP): In this mode the receiver stays at full on power state for 200… 900ms and provides a valid fix. Between fixes with 1… 10 sec interval the receiver stays in Hibernate state. ATP mode is configurable with SiRF binary protocol message ID151. The receiver stays once in while in Full on power mode automatically (typ.every 1800 sec) to receive new ephemeris data from rising satellites or if received signal levels drop below certain level.
Supports a maximum clock of 6.8MHz. Signals: TX (SPI_DO, MISO), RX (SPI_DI, MOSI), CTS_N (SPI_CLK) and RTS_N (SPI_SS_N) At system level the slave has no way of forcing data to the master to indicate it is ready for transmission; the master must poll the client periodically.
Optional Dead Reckoning sensors (e.g. 3-D Accelerometer) Optional connectivity to EEPROM for Client Generated Extended Ephemeris (CGEE) data storage Optional ROM patch code storage to EEPROM and upload to IT430 The accelerometer MEMS sensor provides stationary detection, which allows to reduce the position spread when stationary with weak GPS signals e.g.
Figure 3: Suggested ON_OFF Hibernate control timing diagram. 2.2.5 Antenna input The module supports passive and active antennas. The antenna input RF_IN impedance is 50 ohms and it provides also a bias supply low-pass filtered form VDD_ANT supply. The RF input signal path contains first a SAW band-pass filter, which provides good out-of-band protection against GPS blocking caused by possible near-by wireless transmitters.
(high state) is 200ms about 1us accuracy synchronized at rising edge to full UTC second.The firmware may support optionally other output functions from TM signal, like GPS_ON output for e.g. external LNA power control or RTC_CLK, which outputs buffered RTC clock signal at 32768 Hz; contact FIBOCOM support for details. 2.2.8 ECLK The ECLK is reserved for external clock input with special variant for A-GPS frequency aiding.The input...
systems. RESERVE Do not connect RESERVE Do not connect VCC_RF Output Voltage RF section Ground RF_IN GPS signal input Ground Ground MOSI SPI MOSI MISO SPI MISO SPI Clock RESERVE Do not connect DDC Data DDC Clock Serial Port 1 Serial Port 1 V_BACK Backup voltage supply...
Backup battery voltage V_BACK Backup battery current(Cut Main Power) I_BACK Backup battery current(By ON/OFF) Input pin low voltage -0.4 0.45 Input pin high voltage 1.26 Output pin low voltage for TXD VCC-0.1 - Output pin low voltage 0.40 Output pin high voltage 1.35 Antenna gain Receiver Chain Noise Figure...
Figure 4: Mechanical Specifications Layout This section provides important information for designing a reliable and sensitive GPS system.GPS signals at the surface of the Earth are about 15dB below the thermal noise floor. Signal loss at the antennaand the RF connection must be minimized as much as possible. When defining a GPS receiver layout, the placement of the antenna with respect to the receiver, as well as grounding, shielding and jamming from other digital devices are crucial issues and need to be considered very carefully.
increase the volume outside of the module by defining the dimensions of the paste mask to form a T-shape (or equivalent) extending beyond the Copper mask as shown in Figure 5. The solder paste should have a total thickness of 175 to 200 μm. Figure 5:...
board. To achieve this, position the receiver digital part towards your digital section of the system PCB. Care must also be exercised with placing the receiver in proximity to circuitry that can emit heat. The RF part of the receiver is very sensitive to temperature and sudden changes can have an adverse impact on performance.
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Figure 7: Recommanded Layout Design As seen in Figure 7, an isolated ground area is created around and below the RF connection. This part of the circuit MUST be kept as far from potential noise sources as possible. Make certain that no signal lines cross, and that no signal trace vias appear at the PCB surface within the area of the red rectangle.
To reduce signal reflections, sharp angles in the routing of the micro strip line should be avoided. Chamfers or fillets are preferred for rectangular routing; 45-degree routing is preferred over Manhattan style 90-degree routing. Figure 8: RF Line Recommanded Design ...
Typically a passive antenna is located near electronic components; therefore care should be taken to reduce electrical ‘noise’ that may interfere with the antenna performance. Passive antennas do not require a DC bias voltage and can be directly connected to the RF input pin RF_IN. Sometimes, they may also need a passive matching network to match the impedance to 50 Ohms.
For optimal performance, it is important to place the inductor as close to the microstrip as possible. Figure 10 illustrates the recommended layout and how it should not be done. Good Design Bad Design Antenna Supply Voltage Antenna Supply Voltage Figure 10:Recommended layout for connecting the antenna bias voltage ESD Protection Measures ESD Precautions for Antennas...
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Reflow Refference ① Preheat 160~180℃ 120sec. ② Primary Heat 220℃ 120sec. ③ Peak 260℃ 10sec. max. GTS-4E GPS Module Hardware Integration Manual Page 22 of 22...
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