Asus ROG STRIX B760 Series Bios Manual page 29

Table of Contents

Advertisement

Tweaker's Paradise
The sub-items in this menu allow you to set the Tweaker's Paradise features. Use the <+>
or <-> keys to adjust the value, or key in [Auto] and press the <Enter> key to apply the
optimized setting for the sub-items below.
Realtime Memory Timing
Allows you to enable or disable realtime memory timings. When set to [Enabled], the
system will allow performing realtime memory timing changes after MRC_DONE.
Configuration options: [Disabled] [Enabled]
SPD Write Disable
Allows you to enable or disable SPD Write Disable. For security recommendations,
SPD Write Disable bit must be set. Configuration options: [TRUE] [FALSE]
PVD Ratio Threshold
Allows you to set PVD Ratio Threshold. For the Core Domain PLL, the threshold to
switch to lower post divider is 15 by default. You can set a value lower than 15 when
pushing high BCLK so that Digitally Controlled Oscillator (DCO) remains at reasonable
frequency. Configuration options: [Auto] [1] – [40]
SA PLL Frequency Override
Configuration options: [Auto] [Disabled] [Enabled]
BCLK TSC HW Fixup
Allows you to enable or disable BCLK TSC HW Fixup. BCLK TSC HW Fixup is
disabled during TSC copy form PMA to APIC. Configuration options: [Disabled]
[Enabled]
FLL OC mode
Configuration options: [Auto] [Disabled] [Normal] [Elevated] [Extreme Elevated]
UnderVolt Protection
Allows you to enable or disable UnderVolt Protection. When UnderVolt Protection
is enabled, user will not be able to program under voltage in OS runtime. It is
recommended to keep it enabled by default.
[Disabled] Disables UnderVolt Protection in Runtime.
[Enabled] Allows BIOS undervolting, but enables UnderVolt Protection in Runtime.
Core PLL Voltage
Allows you to configure the offset for the Core PLL VCC Trim. Configuration options:
[Auto] [0.90000] – [1.84500]
GT PLL Voltage
Allows you to configure the offset for the GT PLL VCC Trim. Configuration options:
[Auto] [0.90000] – [1.84500]
Ring PLL Voltage
Allows you to configure the offset for the Ring PLL VCC Trim. Configuration options:
[Auto] [0.90000] – [1.84500]
System Agent PLL Voltage
Allows you to configure the offset for the System Agent PLL VCC Trim. Configuration
options: [Auto] [0.90000] – [1.84500]
ROG STRIX B760 Series BIOS Manual
29

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents