Pin Assignments; P1 (Ethernet Gigabit Signals); P2 (Com1/Com2) - GE CPCI3UX606 Hardware Reference Manual

1.4 Pin Assignments

Publication No. CPCI3UX606-HRM/1

1.4.1 P1 (Ethernet Gigabit Signals)

CAUTION
If a build option that does not provide Gigabit Ethernet on either channel 0 or 1 is selected, then
these pins carry the GPIO signals shown. In this case, no links should be fitted across P1 to prevent
damage to or unexpected operation on any Gigabit Ethernet interface connected to J3 or J4.
Assuming the build option provides Gigabit Ethernet, for Gigabit Ethernet
operation on channel 0 (at J3), fit links across the pins shown below:
Table 1-4 P1 Pin Assignments for Gigabit Ethernet on Channel 0
Pins Linked Signal GPIO Signal
12 and 11 ETH0_2+
10 and 9 ETH0_2-
8 and 7 ETH0_3+
6 and 5 ETH0_3-
For Gigabit Ethernet operation on channel 1 (at J4), fit links across the pins shown
below:
Table 1-5 P1 Pin Assignments for Gigabit Ethernet on Channel 1
Pins Linked Signal GPIO Signal
4 and 3 ETH1_2+
2 and 1 ETH1_2-
ETH1_3‐ and ETH1_3+ are selected using P9 and P10.

1.4.2 P2 (COM1/COM2)

COM1 is 2‐wire RS232 DTE as a minimum (no RTS/CTS); 4‐wire operation
depends on availability of the required signals, which is an IMP3A build option
(also see P9 and P10). RS232/RS422 configuration of COM1 is software controlled;
RS422 option signals are given in parentheses.
COM2 is 4‐wire permanently. RS232/RS422 configuration of COM2 is software
controlled; RS422 option signals are given in parentheses.
Table 1-6 P2 Pin Assignments
Pin Signal
1
a
COM1_LB
3
a
COM1_LB
5 COM1_TXD (TXD_A) 6
7 COM1_CTS (RXD_B) 8
9 No connection
11 No connection
13 COM2_TXD (TXD_A) 14 COM2_LB
15 COM2_LB b
17 COM2_RTS (TXD_B) 18 COM2_CTS (RXD_B)
19 GND
a.Connected between pins 1, 2 and 3.
b.Connected between pins 12, 14 and 15.
GPIO4
GPIO5
GPIO7
GPIO8
GPIO6
GPIO9
Pin Signal
2
a
COM1_LB
4 No connection
COM1_RXD (RXD_A)
COM1_RTS (TXD_B)
10 No connection
12 COM2_LB
b
b
16 COM2_RXD (RXD_A)
20 GND
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